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ADS1232IPWR

24-bit delta-sigma ADC with PGA, 10/80SPS, gain 1-128x, TSSOP-28, for weigh scales

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Pieza del fabricante：

ADS1232IPWR

Paquete：

TSSOP-28 (9.7 x 4.4mm, 0.65mm pitch)

Marca：
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Descripción

Productos

The ADS1232IPWR from Texas Instruments is a 24-bit low-latency delta-sigma ADC with integrated programmable gain amplifier (PGA). Supporting 2 differential inputs, PGA gains of 1/2/64/128, and data rates of 10SPS or 80SPS, it is specifically designed for precision weigh scale and bridge sensor applications.

Especificaciones

Resolution 24-bit
Canales 2 differential (selectable)
PGA Gains 1 / 2 / 64 / 128
Data Rates 10 SPS or 80 SPS
Input Range ±2.5V (gain=1), ±19.5mV (gain=128)
Tensión de alimentación 2.7V – 5.3V
Current 2.5mA (typ)
Temperatura de funcionamiento -40°C to +85°C
Paquete TSSOP-28 (IPWR = tape & reel)

Características

  • 24-bit resolution with no missing codes for precision measurement
  • Integrated PGA with gains up to 128x for direct bridge sensor interfacing
  • 10SPS mode with 50/60Hz simultaneous rejection
  • 80SPS mode for faster measurement throughput
  • Low-latency filter for fast step response
  • Internal oscillator — no external clock required

Aplicaciones

  • Electronic weigh scales and load cells
  • Pressure transducers and strain gauges
  • Flow meters and level sensors
  • Blood glucose and medical measurement

The ADS1232IPWR from Texas Instruments is a 24-bit precision delta-sigma ADC with integrated programmable gain amplifier, specifically optimized for weigh scale and bridge sensor measurement applications. The PGA offers gains of 1, 2, 64, and 128, enabling direct connection to low-output bridge sensors without external signal conditioning. The 10SPS data rate provides simultaneous 50Hz/60Hz power-line rejection, while the 80SPS mode offers faster throughput. The low-latency digital filter provides fast settling for multiplexed or step-change inputs, critical for weigh scale zero-tracking and taring operations.

The ADS1232IPWR uses a 4th-order delta-sigma modulator followed by a programmable digital decimation filter. The modulator converts the analog input into a high-speed 1-bit data stream at the modulator frequency (fMOD). The PGA amplifies the differential input signal before the modulator, with gain settings of 1, 2, 64, or 128. At 10SPS, the digital filter provides simultaneous 50Hz and 60Hz notch rejection (minimum 80dB), ideal for power-line noise suppression. At 80SPS, the filter provides faster response with reduced line-frequency rejection. The low-latency filter architecture settles in a single conversion cycle (unlike sinc filters that require multiple cycles), enabling rapid multiplexing between channels or fast response to step inputs.

Pin Nombre Descripción
1 AINP1 Channel 1 positive input
2 AINN1 Channel 1 negative input
3 AINP2 Channel 2 positive input
4 AINN2 Channel 2 negative input
5 AGND Analog ground
6 REFP Reference positive input
7 REFN Reference negative input
8 AVDD Analog supply (2.7-5.3V)
9 DVDD Digital supply (2.7-5.3V)
10 CLK External clock / internal oscillator select
11 /PDWN Power-down (active low)
12 SPEED Data rate select (10/80 SPS)
13 GAIN1 PGA gain select bit 1
14 GAIN0 PGA gain select bit 0
15 MUX Input channel select
16 /DRDY Data ready (active low)
17 DOUT Serial data output
18 SCLK Serial clock input
19 TEMP+ Temperature sensor +
20 TEMP- Temperature sensor –
21-28 NC/DNC No connect / Do not connect
  • Electronic weigh scales and precision load cell measurement
  • Pressure transducer and strain gauge data acquisition
  • Industrial flow meter and liquid level sensing
  • Blood glucose monitors and medical precision measurement
Modelo Fabricante Resolution PGA Speed
ADS1234 TI 24-bit 1-128 10/80SPS
ADS1256 TI 24-bit 1-64 30kSPS
AD7190 ADI 24-bit 1-128 4.8kHz
HX711 Avia 24-bit 32/64/128 10/80SPS
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