The TLV62569PDDCT operates as a current-mode synchronous buck (step-down) DC-DC converter, converting a higher input voltage to a lower regulated output voltage with high efficiency through high-frequency switching and synchronous rectification.
Synchronous Buck Topology: The converter integrates two N-channel MOSFET switches: a high-side switch (connected between VIN and the SW node) and a low-side switch (connected between the SW node and GND). During the ON-time, the high-side switch closes and current flows from VIN through the inductor to the output capacitor and load, storing energy in the inductor magnetic field. During the OFF-time, the high-side switch opens and the low-side switch closes, providing a path for the inductor current to freewheel through the low-side switch to GND. The synchronous rectifier (low-side MOSFET) replaces the traditional Schottky diode, significantly reducing conduction losses and improving efficiency, especially at low output voltages where diode forward voltage represents a large fraction of the output.
Current-Mode Control: The device uses peak current-mode control, where the error amplifier output (proportional to the difference between the feedback voltage and the 0.6V internal reference) sets the peak inductor current threshold for each switching cycle. The high-side switch turns on at the beginning of each cycle, and the inductor current ramps up linearly. When the sensed current reaches the threshold set by the error amplifier, the high-side switch turns off and the low-side switch turns on. This control method provides inherent cycle-by-cycle current limiting, fast transient response, and easy loop compensation.
PWM Mode: At load currents above the PSM threshold (typically around 100 mA), the device operates in continuous conduction mode (CCM) with fixed 1.5 MHz switching frequency. The duty cycle is approximately D = VOUT / VIN under ideal conditions. The fixed frequency operation ensures predictable EMI performance and enables the use of small, low-profile inductors and ceramic capacitors.
Power Save Mode (PSM): When the load current drops below the PSM threshold, the device transitions to pulse frequency modulation (PFM) mode. In PSM, the high-side switch is pulsed only when the output voltage drops below a threshold slightly below the regulation target, and multiple pulses may be skipped between active pulses. This dramatically reduces switching losses at light loads because the MOSFETs switch much less frequently. The switching frequency in PSM varies proportionally with load current, from a few kHz at very light loads up to the 1.5 MHz PWM frequency at the PSM-to-PWM transition point. This keeps quiescent current very low at standby.
Voltage Feedback: The output voltage is sensed through an external resistor divider connected between VOUT, the FB (feedback) pin, and GND. The FB pin is compared against the 0.6V internal reference by the error amplifier. The output voltage is set by: VOUT = 0.6V × (1 + R1/R2), where R1 is the upper resistor and R2 is the lower resistor. Choosing appropriate resistor values (typically in the 100 kΩ-1 MΩ range) sets the desired output voltage while minimizing divider current.
Soft Start: At power-up or when exiting shutdown, the internal soft-start circuit gradually increases the current limit threshold over approximately 1 ms, allowing the output voltage to ramp up smoothly without overshoot or excessive inrush current that could trigger OCP.
Protection: Overcurrent protection (OCP) limits the peak inductor current on a cycle-by-cycle basis. If an overcurrent condition persists, the device enters hiccup mode, periodically retrying to recover from the fault. Thermal shutdown disables the device when the junction temperature exceeds approximately 150°C, with automatic recovery after the device cools below the hysteresis threshold.