{"id":9853,"date":"2026-07-06T11:26:15","date_gmt":"2026-07-06T11:26:15","guid":{"rendered":"https:\/\/materialparts.com\/sy58011umg\/"},"modified":"2026-07-06T11:26:15","modified_gmt":"2026-07-06T11:26:15","slug":"sy58011umg","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/sy58011umg\/","title":{"rendered":"SY58011UMG"},"content":{"rendered":"<h2>\u4ea7\u54c1\u6982\u89c8<\/h2>\n<p>The SY58011UMG from Microchip (Micrel) is a 7GHz 1:2 CML fanout buffer\/translator with internal I\/O termination. It accepts LVPECL, LVDS, or CML inputs and provides two identical CML outputs with less than 15ps skew and less than 10ps total jitter in a 16-MLF (3x3mm) package.<\/p>\n<h2>\u4e3b\u8981\u89c4\u683c<\/h2>\n<ul>\n<li>Type: 1:2 CML Fanout Buffer\/Translator<\/li>\n<li>Manufacturer: Microchip (Micrel)<\/li>\n<li>Max Frequency: 7GHz (clock) \/ 10.7Gbps (data)<\/li>\n<li>Ratio: 1:2<\/li>\n<li>Input: LVPECL, LVDS, CML (AC\/DC coupled)<\/li>\n<li>Output: CML (400mV swing)<\/li>\n<li>Skew: <15ps max<\/li>\n<li>Total Jitter: <10ps pk-pk<\/li>\n<li>Prop Delay: <250ps<\/li>\n<li>Rise\/Fall: <60ps<\/li>\n<li>Supply: 2.5V\/3.3V<\/li>\n<li>Icc: 75mA typ<\/li>\n<li>Package: 16-MLF (3x3mm)<\/li>\n<li>Operating Temp: -40C to +85C<\/li>\n<li>RoHS: Compliant<\/li>\n<\/ul>\n<h2>\u7279\u70b9<\/h2>\n<ul>\n<li>7GHz clock \/ 10.7Gbps data rate<\/li>\n<li>Accepts LVPECL, LVDS, CML inputs<\/li>\n<li><15ps skew between outputs<\/li>\n<li><10ps total jitter for clock distribution<\/li>\n<li>400mV CML output swing into 50 Ohm<\/li>\n<\/ul>\n<h2>\u5e94\u7528<\/h2>\n<ul>\n<li>High-speed clock distribution<\/li>\n<li>FPGA\/ASIC clock fanout<\/li>\n<li>Optical transceiver clocking<\/li>\n<li>Test and measurement equipment<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The SY58011UMG from Microchip (Micrel) is a 7GHz 1:2 CML fanout buffer\/translator with internal I\/O termination. It accepts LVPECL, LVDS, or CML inputs and provides two identical CML outputs with less than 15ps skew and less than 10ps total jitter in a 16-MLF (3x3mm) package. Key Specifications Type: 1:2 CML Fanout Buffer\/Translator Manufacturer: [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[1145],"chip_brand":[134],"class_list":["post-9853","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","tag-sy58011umg","chip_brand-microchip"],"acf":{"brief_explanation":"7GHz 1:2 CML fanout buffer, <15ps skew, Precision Edge, 16-MLF, Microchip","date_code":"","package_case":"16-MLF \/ VFQFN (3.0 x 3.0 x 0.9mm)","in_stock":8679,"datasheet":"https:\/\/www.microchip.com\/en-us\/product\/sy58011u","price":"$11.52 @ 1ku","product_introduction":"The SY58011UMG from Microchip is a 7GHz 1:2 CML fanout buffer\/translator with internal I\/O termination, accepting LVPECL\/LVDS\/CML inputs and providing two CML outputs with <15ps skew and <10ps jitter in a 16-MLF 3x3mm package.","working_principle":"The SY58011U uses Micrel Precision Edge architecture with a high-speed differential input stage including internal termination resistors. The input stage accepts LVPECL, LVDS, or CML signals as small as 100mV without external level-shifting. The signal is fanned out to two identical CML output drivers, each providing 400mV swing into 50 Ohm loads with source termination.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Function<\/th><\/tr><tr><td>1<\/td><td>VREF-AC<\/td><td>AC-coupled input reference voltage<\/td><\/tr><tr><td>2<\/td><td>IN+<\/td><td>Non-inverting differential input<\/td><\/tr><tr><td>3<\/td><td>IN-<\/td><td>Inverting differential input<\/td><\/tr><tr><td>4<\/td><td>VT<\/td><td>Input termination voltage control<\/td><\/tr><tr><td>5<\/td><td>VDD<\/td><td>Power supply (2.5V\/3.3V)<\/td><\/tr><tr><td>6<\/td><td>Q0+<\/td><td>Output 0 non-inverting (CML)<\/td><\/tr><tr><td>7<\/td><td>Q0-<\/td><td>Output 0 inverting (CML)<\/td><\/tr><tr><td>8<\/td><td>GND<\/td><td>Ground<\/td><\/tr><\/table>","application_scenarios":"<ul><li>High-speed clock distribution<\/li><li>FPGA\/ASIC clock fanout<\/li><li>Optical transceiver clocking<\/li><li>SerDes reference clock distribution<\/li><\/ul>","alternative_models":"<table><tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Spec<\/th><th>Package<\/th><\/tr><tr><td>SY58012UMG<\/td><td>Microchip<\/td><td>7GHz 1:2 LVPECL fanout<\/td><td>16-MLF<\/td><\/tr><tr><td>NB6L16MNG<\/td><td>onsemi<\/td><td>8GHz 1:2 CML fanout<\/td><td>QFN-16<\/td><\/tr><tr><td>LMK1C1102<\/td><td>TI<\/td><td>1:2 LVCMOS fanout<\/td><td>TSSOP-8<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/9853","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=9853"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/9853\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=9853"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=9853"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=9853"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=9853"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}