{"id":8013,"date":"2026-06-28T06:44:54","date_gmt":"2026-06-28T06:44:54","guid":{"rendered":"https:\/\/materialparts.com\/sn74ls157n\/"},"modified":"2026-06-28T11:43:54","modified_gmt":"2026-06-28T11:43:54","slug":"sn74ls157n","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/sn74ls157n\/","title":{"rendered":"SN74LS157N"},"content":{"rendered":"

\u4ea7\u54c1\u6982\u89c8<\/h2>\n

The SN74LS157N from Texas Instruments is a quad 2:1 data selector\/multiplexer that chooses between two 4-bit data sources under a single select line \u2014 the standard digital 2:1 MUX in a 16-pin PDIP package.<\/p>\n

\u4e3b\u8981\u89c4\u683c<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n
\u529f\u80fd<\/td>\nQuad 2:1 data selector\/multiplexer<\/td>\n<\/tr>\n
\u903b\u8f91\u5bb6\u65cf<\/td>\nLS (Low-power Schottky)<\/td>\n<\/tr>\n
\u7535\u6e90\u7535\u538b<\/td>\n4.75V to 5.25V<\/td>\n<\/tr>\n
\u6e20\u9053<\/td>\n4 (independent 2:1 selectors)<\/td>\n<\/tr>\n
Data Inputs<\/td>\n1A,2A,3A,4A and 1B,2B,3B,4B<\/td>\n<\/tr>\n
Select<\/td>\nA\/B (single select; LOW=A, HIGH=B)<\/td>\n<\/tr>\n
Strobe<\/td>\nG (active-LOW enable; LOW=active, HIGH=all outputs LOW)<\/td>\n<\/tr>\n
\u4f20\u64ad\u5ef6\u8fdf<\/td>\n10-18ns typical<\/td>\n<\/tr>\n
\u5de5\u4f5c\u6e29\u5ea6<\/td>\n0\u00b0C to +70\u00b0C<\/td>\n<\/tr>\n
\u5305\u88c5<\/td>\nPDIP-16 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n

\u7279\u70b9<\/h2>\n
    \n
  • Four 2:1 multiplexer channels with common select<\/li>\n
  • Single A\/B select input (LOW=A, HIGH=B)<\/li>\n
  • Strobe (G) forces all outputs LOW when HIGH<\/li>\n
  • Non-inverting data path<\/li>\n
  • True output (not complemented)<\/li>\n<\/ul>\n

    \u5e94\u7528<\/h2>\n
      \n
    • 4-bit data source selection<\/li>\n
    • Parallel data switching<\/li>\n
    • ALU input selection<\/li>\n
    • Bus multiplexing<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The SN74LS157N from Texas Instruments is a quad 2:1 data selector\/multiplexer that chooses between two 4-bit data sources under a single select line \u2014 the standard digital 2:1 MUX in a 16-pin PDIP package. Key Specifications Function Quad 2:1 data selector\/multiplexer Logic Family LS (Low-power Schottky) Supply Voltage 4.75V to 5.25V Channels 4 […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-8013","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"Quad 2:1 data selector MUX, single select, strobe, LS TTL, PDIP-16","date_code":"","package_case":"PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":4000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74ls157.pdf","price":"$0.50 @ 1ku","product_introduction":"The SN74LS157N from Texas Instruments is a quad 2:1 data selector\/multiplexer that selects one of two 4-bit data sources based on a single select input. When A\/B=LOW, outputs Y1-Y4 = A1-A4; when A\/B=HIGH, outputs Y1-Y4 = B1-B4. The strobe input (G, active-LOW) enables the outputs: G=LOW = normal selection; G=HIGH = all outputs forced LOW regardless of data. The 74157 is the non-inverting version; the 74158 is the inverting version (outputs = complement of selected data). The single select line controls all four channels simultaneously, making the 74157 ideal for switching between two 4-bit data buses \u2014 a common need in ALU input selection, memory addressing, and parallel data routing. The 74157 is simpler than the CD4019 (which has two select inputs for AND-OR logic) \u2014 the 74157 provides straightforward 2:1 selection. The N suffix denotes the PDIP-16 package.","working_principle":"The SN74LS157N selects between two 4-bit sources under a single A\/B select control. Each of the four channels implements Yi = G\u0304 \u00b7 [(A\/B\u0304)\u00b7Ai + (A\/B)\u00b7Bi]. When G=LOW (enabled) and A\/B=LOW: Yi = Ai (source A selected). When G=LOW and A\/B=HIGH: Yi = Bi (source B selected). When G=HIGH (disabled): Yi = 0 (all outputs LOW, regardless of A\/B, Ai, Bi). The non-inverting outputs mean Yi equals the selected data directly. For bus selection: two 4-bit buses connect to A and B inputs; A\/B select chooses which bus drives the output; the selected bus data appears on Y1-Y4. For ALU input selection: two operand registers connect to A and B; A\/B selects which operand feeds the ALU. The 74158 is the same but inverting: Yi = complement of selected data \u2014 useful when the next stage expects active-LOW inputs.","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Description<\/th><\/tr>\n
      1<\/td>A\/B<\/td>Input<\/td>Select input (LOW=A, HIGH=B)<\/td><\/tr>\n
      2<\/td>1A<\/td>Input<\/td>Channel 1 data input A<\/td><\/tr>\n
      3<\/td>1B<\/td>Input<\/td>Channel 1 data input B<\/td><\/tr>\n
      4<\/td>1Y<\/td>Output<\/td>Channel 1 output<\/td><\/tr>\n
      5<\/td>2A<\/td>Input<\/td>Channel 2 data input A<\/td><\/tr>\n
      6<\/td>2B<\/td>Input<\/td>Channel 2 data input B<\/td><\/tr>\n
      7<\/td>2Y<\/td>Output<\/td>Channel 2 output<\/td><\/tr>\n
      8<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>\n
      9<\/td>3Y<\/td>Output<\/td>Channel 3 output<\/td><\/tr>\n
      10<\/td>3B<\/td>Input<\/td>Channel 3 data input B<\/td><\/tr>\n
      11<\/td>3A<\/td>Input<\/td>Channel 3 data input A<\/td><\/tr>\n
      12<\/td>4Y<\/td>Output<\/td>Channel 4 output<\/td><\/tr>\n
      13<\/td>4B<\/td>Input<\/td>Channel 4 data input B<\/td><\/tr>\n
      14<\/td>4A<\/td>Input<\/td>Channel 4 data input A<\/td><\/tr>\n
      15<\/td>G<\/td>Input<\/td>Strobe (active-LOW enable; HIGH = all outputs LOW)<\/td><\/tr>\n
      16<\/td>VCC<\/td>Power<\/td>Supply (5V)<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • 4-Bit Bus Select:<\/strong> Two 4-bit registers \u2192 A and B inputs; A\/B selects which register drives the bus; Y1-Y4 = selected bus data<\/li>\n
      • ALU Input Select:<\/strong> Two operand sets \u2192 A and B; A\/B = operand select; Y1-Y4 \u2192 ALU inputs; select which operand to process<\/li>\n
      • Memory Address Mux:<\/strong> PC \u2192 A inputs; MAR \u2192 B inputs; A\/B = address source; Y1-Y4 = address to memory; PC or MAR selected<\/li>\n
      • Parallel-to-Serial:<\/strong> Two 4-bit words \u2192 A and B; A\/B alternates at 2\u00d7 data rate; Y1-Y4 = time-multiplexed output; combined with shift register for serialization<\/li>\n<\/ul>","alternative_models":"\n
        Model<\/th>Manufacturer<\/th>Key Difference<\/th>Package<\/th>Supply<\/th><\/tr>\n
        74LS157N<\/td>TI\/Nexperia<\/td>Original TTL version with 5V-only supply, typical propagation delay 10-15ns<\/td>DIP-16<\/td>5V TTL<\/td><\/tr>\n
        74LS157D<\/td>TI\/Nexperia<\/td>Surface-mount SOIC version of LS with identical logic function<\/td>SOIC-16<\/td>5V TTL<\/td><\/tr>\n
        74HC157D<\/td>TI\/Nexperia<\/td>CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity<\/td>SOIC-16<\/td>2-6V CMOS<\/td><\/tr>\n
        74HC157N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HC family for prototyping and repair<\/td>DIP-16<\/td>2-6V CMOS<\/td><\/tr>\n
        74HCT157D<\/td>TI\/Nexperia<\/td>CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V<\/td>SOIC-16<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n
        74HCT157N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HCT family for prototyping and repair<\/td>DIP-16<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n
        74AC157D<\/td>TI\/Nexperia<\/td>Advanced CMOS with 2-6V supply and higher output drive current (24mA vs 6mA for HC)<\/td>SOIC-16<\/td>2-6V CMOS<\/td><\/tr>\n
        74AC157N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of AC family for prototyping and repair<\/td>DIP-16<\/td>2-6V CMOS<\/td><\/tr>\n
        74LVC157D<\/td>TI\/Nexperia<\/td>Low-voltage CMOS for 1.65-3.6V modern logic with 24mA output drive and bus-hold inputs<\/td>SOIC-16<\/td>1.65-3.6V CMOS<\/td><\/tr>\n
        74LVC157N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of LVC family for prototyping and repair<\/td>DIP-16<\/td>1.65-3.6V CMOS<\/td><\/tr>\n<\/table>\n

        The 74157 is a Quad 2-Line to 1-Line Data Selector\/Multiplexer. Family variants span from the original LS TTL (5V only) to modern LVC\/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8013","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=8013"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8013\/revisions"}],"predecessor-version":[{"id":8126,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8013\/revisions\/8126"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=8013"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=8013"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=8013"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=8013"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}