{"id":8008,"date":"2026-06-28T06:44:48","date_gmt":"2026-06-28T06:44:48","guid":{"rendered":"https:\/\/materialparts.com\/sn74ls86n-2\/"},"modified":"2026-06-28T11:44:02","modified_gmt":"2026-06-28T11:44:02","slug":"sn74ls86n-2","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/sn74ls86n-2\/","title":{"rendered":"SN74LS86N"},"content":{"rendered":"

\u4ea7\u54c1\u6982\u89c8<\/h2>\n

The SN74LS86N from Texas Instruments contains four independent 2-input Exclusive-OR (XOR) gates \u2014 the TTL standard for parity, comparison, and arithmetic logic in a 14-pin PDIP package.<\/p>\n

\u4e3b\u8981\u89c4\u683c<\/h2>\n\n\n\n\n\n\n\n\n\n
Number of Gates<\/td>\n4 (quad 2-input XOR)<\/td>\n<\/tr>\n
\u903b\u8f91\u5bb6\u65cf<\/td>\nLS (Low-power Schottky)<\/td>\n<\/tr>\n
\u7535\u6e90\u7535\u538b<\/td>\n4.75V to 5.25V<\/td>\n<\/tr>\n
\u4f20\u64ad\u5ef6\u8fdf<\/td>\n14ns typical (‘LS86A)<\/td>\n<\/tr>\n
Output Drive<\/td>\nIOL = 8mA, IOH = -0.4mA<\/td>\n<\/tr>\n
\u529f\u7387\u8017\u6563<\/td>\n30.5mW typical per device<\/td>\n<\/tr>\n
\u5de5\u4f5c\u6e29\u5ea6<\/td>\n0\u00b0C to +70\u00b0C<\/td>\n<\/tr>\n
\u5305\u88c5<\/td>\nPDIP-14 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n

\u7279\u70b9<\/h2>\n
    \n
  • Quad 2-input XOR gates<\/li>\n
  • Y = A \u2295 B = \u0100B + AB\u0304<\/li>\n
  • True\/complement element: one input controls polarity<\/li>\n
  • 14ns propagation delay (LS86A version)<\/li>\n
  • Diode-clamped inputs<\/li>\n<\/ul>\n

    \u5e94\u7528<\/h2>\n
      \n
    • Parity generators and checkers<\/li>\n
    • Binary adders\/subtractors<\/li>\n
    • Logical comparators<\/li>\n
    • True\/complement signal control<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The SN74LS86N from Texas Instruments contains four independent 2-input Exclusive-OR (XOR) gates \u2014 the TTL standard for parity, comparison, and arithmetic logic in a 14-pin PDIP package. Key Specifications Number of Gates 4 (quad 2-input XOR) Logic Family LS (Low-power Schottky) Supply Voltage 4.75V to 5.25V Propagation Delay 14ns typical (‘LS86A) Output Drive […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-8008","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"Quad 2-input XOR gate, LS TTL, 14ns, PDIP-14","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":4000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn54s86.pdf","price":"$0.40 @ 1ku","product_introduction":"The SN74LS86N from Texas Instruments contains four independent 2-input Exclusive-OR (XOR) gates. Each gate implements Y = A \u2295 B; the output is HIGH when exactly one input is HIGH, and LOW when both inputs are the same. The 7486 is the TTL equivalent of the CMOS CD4030\/CD4070, with faster propagation delay (14ns vs 65ns) but limited to 5V supply. The XOR gate's unique property \u2014 output HIGH when inputs differ \u2014 makes it indispensable for parity generation, binary addition (Sum = A\u2295B), and comparison (A\u2295B = 0 if A=B). As a true\/complement element: with one input as control, the gate passes data when control=LOW or inverts data when control=HIGH. The LS86A suffix denotes the improved low-power Schottky version with better specs than the original 7486. The N suffix denotes the PDIP-14 through-hole package.","working_principle":"Each XOR gate in the SN74LS86N performs Y = A \u2295 B = \u0100B + AB\u0304. Truth table: A=0,B=0 \u2192 Y=0; A=0,B=1 \u2192 Y=1; A=1,B=0 \u2192 Y=1; A=1,B=1 \u2192 Y=0. The output is HIGH when inputs are different (odd parity). As a true\/complement element: B=0 \u2192 Y=A (pass through); B=1 \u2192 Y=\u0100 (invert). B controls whether A passes or inverts. For a 4-bit parity generator: 3 XOR gates cascaded: G1=A\u2295B, G2=G1\u2295C, G3=G2\u2295D; G3 = A\u2295B\u2295C\u2295D (1 if odd number of 1s). For a full adder: Sum = A\u2295B\u2295Cin, Cout = (A\u2295B)\u00b7Cin + A\u00b7B; uses two XOR gates. For a controlled inverter: data on A, invert on B; Y = data when B=0, Y = NOT(data) when B=1; used in ALU design for complement operations.","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Description<\/th><\/tr>\n
      1<\/td>1A<\/td>Input<\/td>Gate 1 input A<\/td><\/tr>\n
      2<\/td>1B<\/td>Input<\/td>Gate 1 input B<\/td><\/tr>\n
      3<\/td>1Y<\/td>Output<\/td>Gate 1 output (A\u2295B)<\/td><\/tr>\n
      4<\/td>2A<\/td>Input<\/td>Gate 2 input A<\/td><\/tr>\n
      5<\/td>2B<\/td>Input<\/td>Gate 2 input B<\/td><\/tr>\n
      6<\/td>2Y<\/td>Output<\/td>Gate 2 output (A\u2295B)<\/td><\/tr>\n
      7<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>\n
      8<\/td>3Y<\/td>Output<\/td>Gate 3 output (A\u2295B)<\/td><\/tr>\n
      9<\/td>3A<\/td>Input<\/td>Gate 3 input A<\/td><\/tr>\n
      10<\/td>3B<\/td>Input<\/td>Gate 3 input B<\/td><\/tr>\n
      11<\/td>4Y<\/td>Output<\/td>Gate 4 output (A\u2295B)<\/td><\/tr>\n
      12<\/td>4A<\/td>Input<\/td>Gate 4 input A<\/td><\/tr>\n
      13<\/td>4B<\/td>Input<\/td>Gate 4 input B<\/td><\/tr>\n
      14<\/td>VCC<\/td>Power<\/td>Supply (5V)<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • 4-Bit Parity Generator:<\/strong> 3 XOR gates cascaded; output = 1 for odd parity; used in serial communication error detection<\/li>\n
      • Controlled Inverter:<\/strong> Data \u2192 A; invert control \u2192 B; Y = data (B=0) or NOT data (B=1); ALU complement operation<\/li>\n
      • Full Adder:<\/strong> Two 7486 XOR gates + AND\/OR gates; Sum = A\u2295B\u2295Cin; used in multi-bit adder chains<\/li>\n
      • Comparator:<\/strong> A\u2295B per bit; NOR all outputs; result = 1 if A=B, 0 if A\u2260B; 4-bit equality detector<\/li>\n<\/ul>","alternative_models":"\n
        Model<\/th>Manufacturer<\/th>Key Difference<\/th>Package<\/th>Supply<\/th><\/tr>\n
        74LS86N<\/td>TI\/Nexperia<\/td>Original TTL version with 5V-only supply, typical propagation delay 10-15ns<\/td>DIP-14<\/td>5V TTL<\/td><\/tr>\n
        74LS86D<\/td>TI\/Nexperia<\/td>Surface-mount SOIC version of LS with identical logic function<\/td>SOIC-14<\/td>5V TTL<\/td><\/tr>\n
        74HC86D<\/td>TI\/Nexperia<\/td>CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity<\/td>SOIC-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74HC86N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HC family for prototyping and repair<\/td>DIP-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74HCT86D<\/td>TI\/Nexperia<\/td>CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V<\/td>SOIC-14<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n
        74HCT86N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HCT family for prototyping and repair<\/td>DIP-14<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n
        74AC86D<\/td>TI\/Nexperia<\/td>Advanced CMOS with 2-6V supply and higher output drive current (24mA vs 6mA for HC)<\/td>SOIC-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74AC86N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of AC family for prototyping and repair<\/td>DIP-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74LVC86D<\/td>TI\/Nexperia<\/td>Low-voltage CMOS for 1.65-3.6V modern logic with 24mA output drive and bus-hold inputs<\/td>SOIC-14<\/td>1.65-3.6V CMOS<\/td><\/tr>\n
        74LVC86N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of LVC family for prototyping and repair<\/td>DIP-14<\/td>1.65-3.6V CMOS<\/td><\/tr>\n<\/table>\n

        The 7486 is a Quad 2-Input Exclusive-OR Gate. Family variants span from the original LS TTL (5V only) to modern LVC\/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8008","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=8008"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8008\/revisions"}],"predecessor-version":[{"id":8131,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8008\/revisions\/8131"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=8008"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=8008"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=8008"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=8008"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}