{"id":8005,"date":"2026-06-28T06:38:18","date_gmt":"2026-06-28T06:38:18","guid":{"rendered":"https:\/\/materialparts.com\/cd4012be\/"},"modified":"2026-06-28T11:44:07","modified_gmt":"2026-06-28T11:44:07","slug":"cd4012be","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/cd4012be\/","title":{"rendered":"CD4012BE"},"content":{"rendered":"

\u4ea7\u54c1\u6982\u89c8<\/h2>\n

The CD4012BE from Texas Instruments contains two independent 4-input NAND gates \u2014 the CMOS counterpart of the SN74LS20N for 3V-18V systems in a 14-pin PDIP package.<\/p>\n

\u4e3b\u8981\u89c4\u683c<\/h2>\n\n\n\n\n\n\n\n\n
Number of Gates<\/td>\n2 (dual 4-input NAND)<\/td>\n<\/tr>\n
Technology<\/td>\nCD4000B CMOS<\/td>\n<\/tr>\n
\u7535\u6e90\u7535\u538b<\/td>\n3V to 18V<\/td>\n<\/tr>\n
\u4f20\u64ad\u5ef6\u8fdf<\/td>\n60ns typical @ VDD=10V<\/td>\n<\/tr>\n
\u9759\u6001\u7535\u6d41<\/td>\n0.01\u00b5A typical @ 25\u00b0C<\/td>\n<\/tr>\n
\u5de5\u4f5c\u6e29\u5ea6<\/td>\n-55\u00b0C to +125\u00b0C<\/td>\n<\/tr>\n
\u5305\u88c5<\/td>\nPDIP-14 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n

\u7279\u70b9<\/h2>\n
    \n
  • Dual 4-input NAND gates<\/li>\n
  • Wide supply voltage: 3V to 18V<\/li>\n
  • Output LOW only when all four inputs are HIGH<\/li>\n
  • Near-zero quiescent current<\/li>\n<\/ul>\n

    \u5e94\u7528<\/h2>\n
      \n
    • Multi-condition decoding<\/li>\n
    • Address decoding in CMOS systems<\/li>\n
    • Control logic for battery-powered designs<\/li>\n
    • General CMOS logic<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The CD4012BE from Texas Instruments contains two independent 4-input NAND gates \u2014 the CMOS counterpart of the SN74LS20N for 3V-18V systems in a 14-pin PDIP package. Key Specifications Number of Gates 2 (dual 4-input NAND) Technology CD4000B CMOS Supply Voltage 3V to 18V Propagation Delay 60ns typical @ VDD=10V Quiescent Current 0.01\u00b5A typical […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-8005","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"Dual 4-input NAND gate, CMOS 3-18V, 60ns, PDIP-14","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":3000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cd4012b.pdf","price":"$0.35 @ 1ku","product_introduction":"The CD4012BE from Texas Instruments contains two independent 4-input NAND gates. Each gate implements Y = NOT(A AND B AND C AND D); the output goes LOW only when all four inputs are simultaneously HIGH. The CD4012 is the CMOS equivalent of the TTL 7420, with the advantage of 3V-18V supply range and near-zero quiescent current. The 4-input NAND is essential for address decoding and multi-condition logic in CMOS systems. For example, to generate an active-LOW chip select when a 4-bit address matches a specific pattern, the CD4012 directly provides the decoded output. The wide supply range allows the CD4012 to be used in 12V automotive systems, 9V battery circuits, and 3.3V\/5V digital logic \u2014 all with the same IC. The BE suffix denotes the PDIP-14 package.","working_principle":"Each 4-input NAND gate in the CD4012BE performs Y = (A\u00b7B\u00b7C\u00b7D)'. The output is LOW only when all four inputs A, B, C, D are HIGH. For any other combination (at least one input LOW), the output is HIGH. The CMOS implementation uses a series PMOS network connecting the output to VDD (when any input is LOW, the PMOS network conducts, pulling output HIGH) and a series NMOS network connecting the output to VSS (when all inputs are HIGH, the NMOS network conducts, pulling output LOW). This series structure for 4 inputs is more complex than 2-input gates but provides the same basic NAND function with wider input capability. Unused inputs must be tied to VDD or VSS \u2014 never left floating (CMOS inputs are very high impedance and will drift to undefined levels). Tie unused inputs to VDD to make them logically '1' (don't care in NAND).","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Description<\/th><\/tr>\n
      1<\/td>1Y<\/td>Output<\/td>Gate 1 output<\/td><\/tr>\n
      2<\/td>1A<\/td>Input<\/td>Gate 1 input A<\/td><\/tr>\n
      3<\/td>1B<\/td>Input<\/td>Gate 1 input B<\/td><\/tr>\n
      4<\/td>1C<\/td>Input<\/td>Gate 1 input C<\/td><\/tr>\n
      5<\/td>1D<\/td>Input<\/td>Gate 1 input D<\/td><\/tr>\n
      6<\/td>NC<\/td>\u2014<\/td>No connection<\/td><\/tr>\n
      7<\/td>VSS<\/td>Power<\/td>Ground<\/td><\/tr>\n
      8<\/td>NC<\/td>\u2014<\/td>No connection<\/td><\/tr>\n
      9<\/td>2A<\/td>Input<\/td>Gate 2 input A<\/td><\/tr>\n
      10<\/td>2B<\/td>Input<\/td>Gate 2 input B<\/td><\/tr>\n
      11<\/td>2C<\/td>Input<\/td>Gate 2 input C<\/td><\/tr>\n
      12<\/td>2D<\/td>Input<\/td>Gate 2 input D<\/td><\/tr>\n
      13<\/td>2Y<\/td>Output<\/td>Gate 2 output<\/td><\/tr>\n
      14<\/td>VDD<\/td>Power<\/td>Supply (3V to 18V)<\/td><\/tr>\n<\/table>\n

      CD4012BE uses the PDIP-14 package with standard CMOS 4000-series pinout convention: VDD at Pin 14, VSS at Pin 7. Each of the two NAND gates uses four input pins and one output pin \u2014 Gate 1 uses Pins 1-4 (inputs) and Pin 13 (output), Gate 2 uses Pins 9-12 (inputs) and Pin 6 (output). Pins 5 and 8 are not connected internally. All unused CMOS inputs MUST be tied to VDD or VSS to prevent floating-gate oscillation and excessive supply current. The CD4012BM is the SOIC-14 surface-mount equivalent with identical pinout. For TTL-compatible input levels, the 74HC20 (2.0-6.0V) or 74LS20 (4.75-5.25V) provides the same dual 4-input NAND function.<\/p>","application_scenarios":"

        \n
      • 4-Bit Address Decode:<\/strong> 4 address lines (with inverters as needed) \u2192 1A-1D; 1Y goes LOW only for target address; 1Y \u2192 active-LOW chip select<\/li>\n
      • All-HIGH Detection:<\/strong> 4 status signals \u2192 A,B,C,D; Y = LOW when all 4 are HIGH; all-systems-go detector (inverted)<\/li>\n
      • 12V Logic Decode:<\/strong> VDD=12V; 4 control signals at 12V levels; NAND output drives 12V logic directly; no level shifting needed<\/li>\n
      • Battery-Powered Gating:<\/strong> VDD=9V battery; 4 sensor inputs; NAND output = alarm when all sensors active; near-zero standby current<\/li>\n<\/ul>","alternative_models":"\n
        Model<\/th>Manufacturer<\/th>Key Difference<\/th>Package<\/th>Supply<\/th><\/tr>\n
        CD4012BM<\/td>TI<\/td>SOIC-14 surface-mount version with identical logic function and 3-18V range<\/td>SOIC-14<\/td>3-18V<\/td><\/tr>\n
        CD4012BE<\/td>TI<\/td>Through-hole DIP version for prototyping and legacy board repair<\/td>DIP-14<\/td>3-18V<\/td><\/tr>\n
        HEF4012BT<\/td>NXP<\/td>Pin-compatible CMOS version with improved ESD protection and 3-15V supply<\/td>SOIC-14<\/td>3-15V<\/td><\/tr>\n
        MC144012BDR2G<\/td>onsemi<\/td>Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option<\/td>SOIC-14<\/td>3-18V<\/td><\/tr>\n
        74HC20D<\/td>TI\/Nexperia<\/td>HC CMOS version with higher speed and 2-6V supply for modern logic systems<\/td>SOIC-14<\/td>2-6V<\/td><\/tr>\n
        74HC20N<\/td>TI\/Nexperia<\/td>HC CMOS through-hole version for prototyping with 2-6V supply range<\/td>DIP-14<\/td>2-6V<\/td><\/tr>\n
        74HCT20D<\/td>Nexperia<\/td>HCT version with TTL-compatible inputs for mixed 5V TTL\/CMOS systems<\/td>SOIC-14<\/td>4.5-5.5V<\/td><\/tr>\n<\/table>\n

        CD4012 is the CMOS 4000-series dual 4-input nand gate operating over the wide 3-18V supply range. The HEF4012 (NXP) and MC144012 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC20 HC\/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM\/M suffix (SOIC); through-hole versions use the BE suffix (DIP).<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8005","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=8005"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8005\/revisions"}],"predecessor-version":[{"id":8134,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8005\/revisions\/8134"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=8005"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=8005"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=8005"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=8005"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}