{"id":8003,"date":"2026-06-28T06:38:15","date_gmt":"2026-06-28T06:38:15","guid":{"rendered":"https:\/\/materialparts.com\/cd4025be-2\/"},"modified":"2026-06-28T11:44:10","modified_gmt":"2026-06-28T11:44:10","slug":"cd4025be-2","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/cd4025be-2\/","title":{"rendered":"CD4025BE"},"content":{"rendered":"<h2>\u4ea7\u54c1\u6982\u89c8<\/h2>\n<p>The CD4025BE from Texas Instruments contains three independent 3-input NOR gates in a 14-pin PDIP package \u2014 the CMOS complement of the CD4023 NAND, providing the direct NOR function across the 3V-18V supply range.<\/p>\n<h2>\u4e3b\u8981\u89c4\u683c<\/h2>\n<table>\n<tr>\n<td>Number of Gates<\/td>\n<td>3 (triple 3-input NOR)<\/td>\n<\/tr>\n<tr>\n<td>Technology<\/td>\n<td>CD4000B CMOS<\/td>\n<\/tr>\n<tr>\n<td>\u7535\u6e90\u7535\u538b<\/td>\n<td>3V to 18V<\/td>\n<\/tr>\n<tr>\n<td>\u4f20\u64ad\u5ef6\u8fdf<\/td>\n<td>60ns typical @ VDD=10V<\/td>\n<\/tr>\n<tr>\n<td>\u9759\u6001\u7535\u6d41<\/td>\n<td>0.01\u00b5A typical @ 25\u00b0C<\/td>\n<\/tr>\n<tr>\n<td>\u5de5\u4f5c\u6e29\u5ea6<\/td>\n<td>-55\u00b0C to +125\u00b0C<\/td>\n<\/tr>\n<tr>\n<td>\u5305\u88c5<\/td>\n<td>PDIP-14 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n<h2>\u7279\u70b9<\/h2>\n<ul>\n<li>Triple 3-input NOR gates<\/li>\n<li>Wide supply voltage: 3V to 18V<\/li>\n<li>Output HIGH only when ALL inputs are LOW<\/li>\n<li>Near-zero quiescent current<\/li>\n<\/ul>\n<h2>\u5e94\u7528<\/h2>\n<ul>\n<li>All-zero detection<\/li>\n<li>Negative logic OR functions<\/li>\n<li>Active-LOW signal combining<\/li>\n<li>General CMOS logic<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The CD4025BE from Texas Instruments contains three independent 3-input NOR gates in a 14-pin PDIP package \u2014 the CMOS complement of the CD4023 NAND, providing the direct NOR function across the 3V-18V supply range. Key Specifications Number of Gates 3 (triple 3-input NOR) Technology CD4000B CMOS Supply Voltage 3V to 18V Propagation Delay [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-8003","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"Triple 3-input NOR gate, CMOS 3-18V, 60ns, PDIP-14","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":3000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cd4025b.pdf","price":"$0.35 @ 1ku","product_introduction":"The CD4025BE from Texas Instruments contains three independent 3-input NOR gates. Each gate implements Y = NOT(A OR B OR C); the output is HIGH only when all three inputs are LOW. The 3-input NOR is equivalent to a 3-input OR followed by an inverter, but implemented directly in a single gate stage for lower propagation delay. The NOR function is fundamental in digital logic: it is a universal gate (NOR alone can implement any Boolean function). For all-zero detection: three control lines into a NOR gate \u2192 output HIGH only when all three lines are LOW (inactive). For active-LOW combining: the NOR gate treats LOW inputs as 'active'; any one active-LOW input drives the output HIGH. By DeMorgan's theorem, the NOR function is also the AND of complemented inputs: Y = A'\u00b7B'\u00b7C'. This means a 3-input NOR can detect when all three inputs are simultaneously LOW \u2014 useful for monitoring multiple fault lines or status signals. The BE suffix denotes the PDIP-14 package.","working_principle":"Each NOR gate in the CD4025BE performs Y = (A + B + C)' = NOT(A OR B OR C). The output is HIGH only when ALL inputs A, B, and C are LOW. If ANY input is HIGH, the output is LOW. For a 3-input NOR: (0,0,0)\u21921; (0,0,1)\u21920; (0,1,0)\u21920; (0,1,1)\u21920; (1,0,0)\u21920; (1,0,1)\u21920; (1,1,0)\u21920; (1,1,1)\u21920. Only 1 of 8 input combinations produces a HIGH output. By DeMorgan's theorem: Y = A'\u00b7B'\u00b7C' (AND of complements). This means the 3-input NOR is an all-zero detector: the output goes HIGH only when every input is zero. For active-LOW logic (where LOW = active): the NOR gate acts as an OR of active signals \u2014 any active input produces an active-HIGH output. Unused inputs should be tied to VDD or VSS (not left floating) to prevent erratic output behavior from CMOS input noise sensitivity.","pin_description":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Description<\/th><\/tr>\n<tr><td>1<\/td><td>1A<\/td><td>Input<\/td><td>Gate 1 input A<\/td><\/tr>\n<tr><td>2<\/td><td>1B<\/td><td>Input<\/td><td>Gate 1 input B<\/td><\/tr>\n<tr><td>3<\/td><td>2A<\/td><td>Input<\/td><td>Gate 2 input A<\/td><\/tr>\n<tr><td>4<\/td><td>2B<\/td><td>Input<\/td><td>Gate 2 input B<\/td><\/tr>\n<tr><td>5<\/td><td>2C<\/td><td>Input<\/td><td>Gate 2 input C<\/td><\/tr>\n<tr><td>6<\/td><td>2Y<\/td><td>Output<\/td><td>Gate 2 output<\/td><\/tr>\n<tr><td>7<\/td><td>VSS<\/td><td>Power<\/td><td>Ground<\/td><\/tr>\n<tr><td>8<\/td><td>3Y<\/td><td>Output<\/td><td>Gate 3 output<\/td><\/tr>\n<tr><td>9<\/td><td>3A<\/td><td>Input<\/td><td>Gate 3 input A<\/td><\/tr>\n<tr><td>10<\/td><td>3B<\/td><td>Input<\/td><td>Gate 3 input B<\/td><\/tr>\n<tr><td>11<\/td><td>3C<\/td><td>Input<\/td><td>Gate 3 input C<\/td><\/tr>\n<tr><td>12<\/td><td>1Y<\/td><td>Output<\/td><td>Gate 1 output<\/td><\/tr>\n<tr><td>13<\/td><td>1C<\/td><td>Input<\/td><td>Gate 1 input C<\/td><\/tr>\n<tr><td>14<\/td><td>VDD<\/td><td>Power<\/td><td>Supply (3V to 18V)<\/td><\/tr>\n<\/table>","application_scenarios":"<ul>\n<li><strong>All-Zero Detection:<\/strong> Three status signals \u2192 A,B,C; Y=HIGH only when all three are LOW; idle detector or no-fault indicator<\/li>\n<li><strong>Active-LOW OR:<\/strong> Three active-LOW interrupt lines \u2192 NOR gate; Y=HIGH when any interrupt is active (LOW); single active-HIGH interrupt request<\/li>\n<li><strong>Combinational Logic:<\/strong> NOR is universal; combine with other gates for any Boolean function of 3 variables<\/li>\n<li><strong>SR Latch:<\/strong> Two 3-input NOR gates cross-coupled; 2 inputs for Set\/Reset; remaining inputs for additional control or tied LOW<\/li>\n<\/ul>","alternative_models":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><th>Package<\/th><th>Supply<\/th><\/tr>\n<tr><td>CD4025BM<\/td><td>TI<\/td><td>SOIC-14 surface-mount version with identical logic function and 3-18V range<\/td><td>SOIC-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>CD4025BE<\/td><td>TI<\/td><td>Through-hole DIP version for prototyping and legacy board repair<\/td><td>DIP-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>HEF4025BT<\/td><td>NXP<\/td><td>Pin-compatible CMOS version with improved ESD protection and 3-15V supply<\/td><td>SOIC-14<\/td><td>3-15V<\/td><\/tr>\n<tr><td>MC144025BDR2G<\/td><td>onsemi<\/td><td>Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option<\/td><td>SOIC-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>74HC27D<\/td><td>TI\/Nexperia<\/td><td>HC CMOS version with higher speed and 2-6V supply for modern logic systems<\/td><td>SOIC-14<\/td><td>2-6V<\/td><\/tr>\n<tr><td>74HC27N<\/td><td>TI\/Nexperia<\/td><td>HC CMOS through-hole version for prototyping with 2-6V supply range<\/td><td>DIP-14<\/td><td>2-6V<\/td><\/tr>\n<tr><td>74HCT27D<\/td><td>Nexperia<\/td><td>HCT version with TTL-compatible inputs for mixed 5V TTL\/CMOS systems<\/td><td>SOIC-14<\/td><td>4.5-5.5V<\/td><\/tr>\n<\/table>\n<p>CD4025 is the CMOS 4000-series triple 3-input nor gate operating over the wide 3-18V supply range. The HEF4025 (NXP) and MC144025 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC27 HC\/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM\/M suffix (SOIC); through-hole versions use the BE suffix (DIP).<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8003","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=8003"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8003\/revisions"}],"predecessor-version":[{"id":8136,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/8003\/revisions\/8136"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=8003"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=8003"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=8003"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=8003"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}