{"id":7986,"date":"2026-06-28T06:25:47","date_gmt":"2026-06-28T06:25:47","guid":{"rendered":"https:\/\/materialparts.com\/cd4014be\/"},"modified":"2026-06-28T11:44:38","modified_gmt":"2026-06-28T11:44:38","slug":"cd4014be","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/cd4014be\/","title":{"rendered":"CD4014BE"},"content":{"rendered":"

\u4ea7\u54c1\u6982\u89c8<\/h2>\n

The CD4014BE from Texas Instruments is an 8-stage parallel-input serial-output shift register with synchronous parallel load, ideal for reading 8 parallel data lines into a microcontroller using only 3 pins in a 16-pin PDIP package.<\/p>\n

\u4e3b\u8981\u89c4\u683c<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n
\u529f\u80fd<\/td>\n8-stage parallel-input\/serial-output shift register<\/td>\n<\/tr>\n
Technology<\/td>\nCD4000B CMOS<\/td>\n<\/tr>\n
\u7535\u6e90\u7535\u538b<\/td>\n3V to 18V<\/td>\n<\/tr>\n
Parallel Inputs<\/td>\nP1\u2013P8 (8 lines, loaded when PAR\/SER=HIGH)<\/td>\n<\/tr>\n
Serial Input<\/td>\nSER IN (used when PAR\/SER=LOW)<\/td>\n<\/tr>\n
Outputs<\/td>\nQ6, Q7, Q8 (accessible outputs)<\/td>\n<\/tr>\n
Mode Control<\/td>\nPAR\/SER (HIGH=parallel load, LOW=serial shift)<\/td>\n<\/tr>\n
Max Clock Frequency<\/td>\n6MHz typical @ VDD=10V<\/td>\n<\/tr>\n
\u5de5\u4f5c\u6e29\u5ea6<\/td>\n-55\u00b0C to +125\u00b0C<\/td>\n<\/tr>\n
\u5305\u88c5<\/td>\nPDIP-16 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n

\u7279\u70b9<\/h2>\n
    \n
  • 8-bit parallel-to-serial conversion<\/li>\n
  • Synchronous parallel load on clock edge<\/li>\n
  • 3 accessible outputs: Q6, Q7, Q8<\/li>\n
  • Cascadable for 16+ bit conversion<\/li>\n
  • 3V-18V CMOS operation<\/li>\n<\/ul>\n

    \u5e94\u7528<\/h2>\n
      \n
    • Parallel-to-serial data conversion<\/li>\n
    • GPIO expansion (8 inputs \u2192 3 MCU pins)<\/li>\n
    • Keyboard scanning<\/li>\n
    • Multi-switch reading<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The CD4014BE from Texas Instruments is an 8-stage parallel-input serial-output shift register with synchronous parallel load, ideal for reading 8 parallel data lines into a microcontroller using only 3 pins in a 16-pin PDIP package. Key Specifications Function 8-stage parallel-input\/serial-output shift register Technology CD4000B CMOS Supply Voltage 3V to 18V Parallel Inputs P1\u2013P8 […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-7986","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"8-bit parallel-in serial-out shift register, CMOS 3-18V, PDIP-16","date_code":"","package_case":"PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":3000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cd4014b.pdf","price":"$0.50 @ 1ku","product_introduction":"The CD4014BE from Texas Instruments is an 8-stage static shift register with 8 parallel inputs (P1-P8) and 3 accessible outputs (Q6, Q7, Q8). On each rising clock edge, if PAR\/SER=HIGH, the 8 parallel inputs are synchronously loaded into the register (P1\u2192Q1, P2\u2192Q2, ... P8\u2192Q8). If PAR\/SER=LOW, the register shifts: each bit moves one position toward the output, and SER IN fills the vacated position. The Q8 output provides the serial data output, and Q6\/Q7 provide intermediate taps. To read 8 parallel data lines into a microcontroller: (1) Set PAR\/SER=HIGH and clock once to load all 8 bits. (2) Set PAR\/SER=LOW and clock 8 times, reading Q8 after each clock. This uses only 3 MCU pins (CLK, PAR\/SER, data from Q8) to read 8 inputs \u2014 a 5-pin saving. For 16-bit input: cascade two CD4014s by connecting Q8 of the first to SER IN of the second. The BE suffix denotes the PDIP-16 package.","working_principle":"The CD4014BE has two modes controlled by the PAR\/SER input: (1) Parallel Load mode (PAR\/SER=HIGH): On the rising edge of CLK, the 8 parallel inputs P1-P8 are loaded into the internal flip-flops. P1 goes to the first stage, P8 to the last (Q8). The previous serial data is overwritten. (2) Serial Shift mode (PAR\/SER=LOW): On the rising edge of CLK, data shifts one position toward the output: Q1\u2190SER IN, Q2\u2190Q1, Q3\u2190Q2, ... Q8\u2190Q7. The value at Q8 is the data being shifted out. To read 8 parallel inputs: first, set PAR\/SER=HIGH and pulse CLK once to capture P1-P8 into the register. Then set PAR\/SER=LOW and clock 8 times: on the first shift clock, Q8 (which contains P8) is available at the output pin; on the second shift clock, P7 appears; and so on until P1 is the last bit shifted out. The Q6 and Q7 outputs are useful for cascading (Q8\u2192next SER IN) and for checking intermediate register values without additional clocking.","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Description<\/th><\/tr>\n
      1<\/td>P6<\/td>Input<\/td>Parallel input 6<\/td><\/tr>\n
      2<\/td>P7<\/td>Input<\/td>Parallel input 7<\/td><\/tr>\n
      3<\/td>P8<\/td>Input<\/td>Parallel input 8<\/td><\/tr>\n
      4<\/td>Q6<\/td>Output<\/td>Register output stage 6<\/td><\/tr>\n
      5<\/td>Q7<\/td>Output<\/td>Register output stage 7<\/td><\/tr>\n
      6<\/td>Q8<\/td>Output<\/td>Register output stage 8 (serial output)<\/td><\/tr>\n
      7<\/td>CLK<\/td>Input<\/td>Clock (positive edge)<\/td><\/tr>\n
      8<\/td>VSS<\/td>Power<\/td>Ground<\/td><\/tr>\n
      9<\/td>PAR\/SER<\/td>Input<\/td>Mode: HIGH=parallel load, LOW=serial shift<\/td><\/tr>\n
      10<\/td>SER IN<\/td>Input<\/td>Serial data input (used in shift mode)<\/td><\/tr>\n
      11<\/td>P1<\/td>Input<\/td>Parallel input 1 (first stage)<\/td><\/tr>\n
      12<\/td>P2<\/td>Input<\/td>Parallel input 2<\/td><\/tr>\n
      13<\/td>P3<\/td>Input<\/td>Parallel input 3<\/td><\/tr>\n
      14<\/td>P4<\/td>Input<\/td>Parallel input 4<\/td><\/tr>\n
      15<\/td>P5<\/td>Input<\/td>Parallel input 5<\/td><\/tr>\n
      16<\/td>VDD<\/td>Power<\/td>Supply (3V to 18V)<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • 8-Input GPIO Expansion:<\/strong> 8 switches\/sensors \u2192 P1-P8; MCU: CLK, PAR\/SER, Q8 \u2192 MCU; load then shift 8 times to read all 8 inputs via 3 pins<\/li>\n
      • 16-Input Expansion:<\/strong> Two CD4014; Q8(#1) \u2192 SER IN(#2); shared CLK, PAR\/SER; shift 16 times to read all 16 inputs via 3 MCU pins<\/li>\n
      • Keyboard Scanner:<\/strong> 8 key rows \u2192 P1-P8; scan by loading and shifting; column select on separate pins<\/li>\n
      • Parallel-to-Serial:<\/strong> ADC output (8-bit parallel) \u2192 P1-P8; load then shift; single wire to MCU ADC input<\/li>\n<\/ul>","alternative_models":"\n
        Model<\/th>Manufacturer<\/th>Key Difference<\/th>Package<\/th>Supply<\/th><\/tr>\n
        CD4014BM<\/td>TI<\/td>SOIC-16 surface-mount version with identical logic function and 3-18V range<\/td>SOIC-16<\/td>3-18V<\/td><\/tr>\n
        CD4014BE<\/td>TI<\/td>Through-hole DIP version for prototyping and legacy board repair<\/td>DIP-16<\/td>3-18V<\/td><\/tr>\n
        HEF4014BT<\/td>NXP<\/td>Pin-compatible CMOS version with improved ESD protection and 3-15V supply<\/td>SOIC-16<\/td>3-15V<\/td><\/tr>\n
        MC144014BDR2G<\/td>onsemi<\/td>Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option<\/td>SOIC-16<\/td>3-18V<\/td><\/tr>\n
        74HC165D<\/td>TI\/Nexperia<\/td>HC CMOS version with higher speed and 2-6V supply for modern logic systems<\/td>SOIC-16<\/td>2-6V<\/td><\/tr>\n
        74HC165N<\/td>TI\/Nexperia<\/td>HC CMOS through-hole version for prototyping with 2-6V supply range<\/td>DIP-16<\/td>2-6V<\/td><\/tr>\n
        74HCT165D<\/td>Nexperia<\/td>HCT version with TTL-compatible inputs for mixed 5V TTL\/CMOS systems<\/td>SOIC-16<\/td>4.5-5.5V<\/td><\/tr>\n<\/table>\n

        CD4014 is the CMOS 4000-series 8-stage parallel-in\/serial-out shift register operating over the wide 3-18V supply range. The HEF4014 (NXP) and MC144014 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC165 HC\/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM\/M suffix (SOIC); through-hole versions use the BE suffix (DIP).<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7986","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=7986"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7986\/revisions"}],"predecessor-version":[{"id":8151,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7986\/revisions\/8151"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=7986"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=7986"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=7986"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=7986"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}