{"id":7604,"date":"2026-06-26T06:52:25","date_gmt":"2026-06-26T06:52:25","guid":{"rendered":"https:\/\/materialparts.com\/tps3307-18d\/"},"modified":"2026-06-26T14:52:59","modified_gmt":"2026-06-26T14:52:59","slug":"tps3307-18d","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/tps3307-18d\/","title":{"rendered":"TPS3307-18D"},"content":{"rendered":"<h2>\u4ea7\u54c1\u6982\u89c8<\/h2>\n<p>The TPS3307-18D from Texas Instruments is a triple processor supervisor monitoring 3.3V, 1.8V, and an adjustable voltage rail, providing active-low RESET and active-high RESET outputs with 200ms fixed delay in SOIC-8 package.<\/p>\n<h2>\u4e3b\u8981\u89c4\u683c<\/h2>\n<table>\n<tr>\n<td>Monitored Voltages<\/td>\n<td>3.3V, 1.8V, Adj (SENSE1\/2\/3)<\/td>\n<\/tr>\n<tr>\n<td>SENSE1 Threshold<\/td>\n<td>2.93V (3.3V nominal)<\/td>\n<\/tr>\n<tr>\n<td>SENSE2 Threshold<\/td>\n<td>1.68V (1.8V nominal)<\/td>\n<\/tr>\n<tr>\n<td>SENSE3 Threshold<\/td>\n<td>1.25V (adjustable via divider)<\/td>\n<\/tr>\n<tr>\n<td>\u7535\u6e90\u7535\u538b<\/td>\n<td>2 to 6V<\/td>\n<\/tr>\n<tr>\n<td>Supply Current<\/td>\n<td>40uA max<\/td>\n<\/tr>\n<tr>\n<td>Reset Delay<\/td>\n<td>200ms (internal, no ext cap)<\/td>\n<\/tr>\n<tr>\n<td>Manual Reset<\/td>\n<td>Yes (MR pin)<\/td>\n<\/tr>\n<tr>\n<td>\u5305\u88c5<\/td>\n<td>SOIC-8<\/td>\n<\/tr>\n<tr>\n<td>\u5de5\u4f5c\u6e29\u5ea6<\/td>\n<td>-40 to +85 C<\/td>\n<\/tr>\n<\/table>\n<h2>\u7279\u70b9<\/h2>\n<ul>\n<li>Triple supervisory circuits for DSP\/processor systems<\/li>\n<li>Fixed 200ms power-on reset delay (no external capacitor)<\/li>\n<li>Temperature-compensated voltage reference<\/li>\n<li>Manual reset input (MR)<\/li>\n<li>Active-low RESET and active-high RESET outputs<\/li>\n<li>Micropower: 40uA max supply current<\/li>\n<\/ul>\n<h2>\u5e94\u7528<\/h2>\n<ul>\n<li>DSP and processor-based system initialization<\/li>\n<li>Multi-voltage board monitoring<\/li>\n<li>Power-on reset generation<\/li>\n<li>FPGA and ASIC supervisory circuits<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The TPS3307-18D from Texas Instruments is a triple processor supervisor monitoring 3.3V, 1.8V, and an adjustable voltage rail, providing active-low RESET and active-high RESET outputs with 200ms fixed delay in SOIC-8 package. Key Specifications Monitored Voltages 3.3V, 1.8V, Adj (SENSE1\/2\/3) SENSE1 Threshold 2.93V (3.3V nominal) SENSE2 Threshold 1.68V (1.8V nominal) SENSE3 Threshold 1.25V [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,29],"tags":[],"chip_brand":[138],"class_list":["post-7604","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-power-management-ics-pmic","chip_brand-ti"],"acf":{"brief_explanation":"Triple processor supervisor, 3.3V\/1.8V\/Adj, 200ms delay, manual reset, SOIC-8","date_code":"","package_case":"SOIC-8 (4.9 x 3.91 x 1.58 mm)","in_stock":14066,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/tps3307-ep.pdf","price":"$1.81 @ 1ku","product_introduction":"<p>The TPS3307-18D from Texas Instruments is a micropower triple voltage supervisor designed primarily for DSP and processor-based systems that require multiple supply voltages. The TPS3307-18 variant monitors 3.3V (SENSE1, threshold 2.93V), 1.8V (SENSE2, threshold 1.68V), and an adjustable third voltage (SENSE3, threshold 1.25V with external divider). During power-on, the RESET output is asserted when VDD exceeds 1.1V, and remains active until all SENSE inputs rise above their threshold voltages and the internal 200ms timer expires. No external capacitor is needed for the delay. If any monitored voltage drops below its threshold, RESET is immediately asserted. The device includes a manual reset (MR) input that allows external triggering of the reset. Both active-low RESET and active-high RESET outputs are provided for maximum design flexibility. The TPS3307 draws only 40uA maximum supply current.<\/p>","working_principle":"<p>The TPS3307-18D operates through four main subsystems: (1) Voltage monitoring - Three independent voltage comparators monitor the SENSE1, SENSE2, and SENSE3 inputs against precision temperature-compensated reference thresholds (2.93V, 1.68V, and 1.25V respectively). When any SENSE input drops below its threshold, the corresponding comparator output changes state, triggering the reset logic. SENSE3's 1.25V threshold combined with an external resistor divider allows monitoring of any voltage above 1.25V. (2) Reset logic - The outputs of all three comparators are logically OR'd such that any out-of-tolerance condition forces RESET low and RESET high. A power-on reset (POR) circuit also asserts RESET when VDD is below approximately 1.1V, ensuring a defined reset state even during VDD ramp-up. (3) Timer circuit - An internal oscillator and counter generate the 200ms reset timeout delay. This delay starts after all SENSE inputs have risen above their thresholds and the MR input is high. No external timing capacitor is required. (4) Manual reset - The MR input has an internal pull-up resistor and is active-low. When MR is driven low, RESET is immediately asserted regardless of the SENSE input states.<\/p>","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Function<\/th><\/tr><tr><td>1<\/td><td>SENSE1<\/td><td>3.3V monitor input (threshold 2.93V)<\/td><\/tr><tr><td>2<\/td><td>SENSE2<\/td><td>1.8V monitor input (threshold 1.68V)<\/td><\/tr><tr><td>3<\/td><td>RESET<\/td><td>Active-high reset output<\/td><\/tr><tr><td>4<\/td><td>GND<\/td><td>Ground<\/td><\/tr><tr><td>5<\/td><td>MR<\/td><td>Manual reset input (active low)<\/td><\/tr><tr><td>6<\/td><td>SENSE3<\/td><td>Adjustable monitor input (threshold 1.25V)<\/td><\/tr><tr><td>7<\/td><td>RESET<\/td><td>Active-low reset output<\/td><\/tr><tr><td>8<\/td><td>VDD<\/td><td>Supply voltage (2-6V)<\/td><\/tr><\/table>","application_scenarios":"<ul><li>DSP and processor-based system initialization monitoring 3.3V, 1.8V, and a custom voltage rail simultaneously<\/li><li>Multi-voltage FPGA and ASIC board monitoring with 200ms reset delay ensuring stable power before release<\/li><li>Power-on reset generation using the internal 200ms timer without external capacitors<\/li><li>Industrial control systems requiring manual reset capability and dual-polarity (active-high\/low) reset outputs<\/li><\/ul>","alternative_models":"<table><tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><\/tr><tr><td>TPS3307-33D<\/td><td>TI<\/td><td>Monitors 5V\/3.3V\/Adj<\/td><\/tr><tr><td>TPS3823-33DBVR<\/td><td>TI<\/td><td>Single channel, SOT-23-5<\/td><\/tr><tr><td>MAX6746XKVRD3+T<\/td><td>Maxim\/ADI<\/td><td>Dual\/triple, adjustable<\/td><\/tr><tr><td>ADM1185ARMZ<\/td><td>ADI<\/td><td>Quad voltage monitor, MSOP-10<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7604","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=7604"}],"version-history":[{"count":2,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7604\/revisions"}],"predecessor-version":[{"id":7767,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/7604\/revisions\/7767"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=7604"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=7604"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=7604"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=7604"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}