{"id":6544,"date":"2026-06-18T13:45:03","date_gmt":"2026-06-18T13:45:03","guid":{"rendered":"https:\/\/materialparts.com\/psd4235g2v-90u\/"},"modified":"2026-06-18T13:45:03","modified_gmt":"2026-06-18T13:45:03","slug":"psd4235g2v-90u","status":"publish","type":"post","link":"https:\/\/materialparts.com\/zh\/psd4235g2v-90u\/","title":{"rendered":"PSD4235G2V-90U"},"content":{"rendered":"<h2>\u4ea7\u54c1\u6982\u89c8<\/h2>\n<p>The PSD4235G2V-90U from STMicroelectronics is a Flash In-System Programmable (ISP) peripheral for 16-bit MCUs with a 5V supply. It integrates 4Mbit primary Flash, 256Kbit secondary Flash, 64Kbit SRAM, CPLD with macrocells, and 52 I\/O pins in an 80-pin LQFP package.<\/p>\n<h2>\u4e3b\u8981\u89c4\u683c<\/h2>\n<table>\n<tr>\n<td>Primary Flash<\/td>\n<td>4Mbit (8 sectors, 32Kx16)<\/td>\n<\/tr>\n<tr>\n<td>Secondary Flash<\/td>\n<td>256Kbit (4 sectors)<\/td>\n<\/tr>\n<tr>\n<td>SRAM<\/td>\n<td>64Kbit<\/td>\n<\/tr>\n<tr>\n<td>PLD Gates<\/td>\n<td>Over 3000 gates (CPLD + DPLD)<\/td>\n<\/tr>\n<tr>\n<td>Macrocells<\/td>\n<td>16 OMC + 24 IMC<\/td>\n<\/tr>\n<tr>\n<td>I\/O Pins<\/td>\n<td>52 (7 ports)<\/td>\n<\/tr>\n<tr>\n<td>\u7535\u6e90\u7535\u538b<\/td>\n<td>5V +\/-10%<\/td>\n<\/tr>\n<tr>\n<td>Access Time<\/td>\n<td>90ns<\/td>\n<\/tr>\n<tr>\n<td>\u5305\u88c5<\/td>\n<td>80-LQFP (12x12mm)<\/td>\n<\/tr>\n<tr>\n<td>Programming<\/td>\n<td>JTAG ISP<\/td>\n<\/tr>\n<\/table>\n<h2>\u7279\u70b9<\/h2>\n<ul>\n<li>Dual-bank Flash with concurrent read-while-write<\/li>\n<li>3000+ gate CPLD with 16 output macrocells<\/li>\n<li>JTAG in-system programming for all blocks<\/li>\n<li>52 individually configurable I\/O pins<\/li>\n<li>Page register for 256x address space expansion<\/li>\n<li>Programmable power management unit<\/li>\n<li>100,000 Flash erase\/write cycles<\/li>\n<\/ul>\n<h2>\u5e94\u7528<\/h2>\n<ul>\n<li>16-bit MCU peripheral expansion<\/li>\n<li>Embedded system memory and logic integration<\/li>\n<li>Industrial control with ISP firmware updates<\/li>\n<li>Legacy system upgrades<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The PSD4235G2V-90U from STMicroelectronics is a Flash In-System Programmable (ISP) peripheral for 16-bit MCUs with a 5V supply. It integrates 4Mbit primary Flash, 256Kbit secondary Flash, 64Kbit SRAM, CPLD with macrocells, and 52 I\/O pins in an 80-pin LQFP package. Key Specifications Primary Flash 4Mbit (8 sectors, 32Kx16) Secondary Flash 256Kbit (4 sectors) [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,25],"tags":[],"chip_brand":[142],"class_list":["post-6544","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-microcontrollers-mcu","chip_brand-st"],"acf":{"brief_explanation":"Flash ISP peripheral for 16-bit MCUs, 4Mbit Flash+256Kbit+64Kbit SRAM, CPLD, 52 I\/O, 80-LQFP","date_code":"","package_case":"80-LQFP (12x12mm)","in_stock":8372,"datasheet":"https:\/\/media.digikey.com\/pdf\/Data%20Sheets\/ST%20Microelectronics%20PDFS\/PSD4235G2.pdf","price":"","product_introduction":"The PSD4235G2V-90U is a Flash In-System Programmable peripheral device designed to expand 16-bit MCU-based systems. It integrates dual-bank Flash memories (4Mbit primary + 256Kbit secondary), 64Kbit SRAM, and over 3000 gates of CPLD logic with 16 output macrocells and 24 input macrocells. The 52 I\/O pins across 7 ports are individually configurable for MCU I\/O, PLD I\/O, latched address output, or special functions. JTAG ISP allows complete device programming without MCU participation, enabling field firmware updates. The page register expands the MCU address space by a factor of 256.","working_principle":"The PSD4235G2V-90U integrates memory, programmable logic, and I\/O expansion into a single device. The Decode PLD (DPLD) generates chip selects for all internal memory blocks based on user-defined address mapping. The Complex PLD (CPLD) with 16 output macrocells implements user-defined combinatorial and registered logic functions. Dual-bank Flash supports concurrent operation where the MCU can read from one bank while erasing\/programming the other. The JTAG interface enables complete in-system programming of Flash, PLD, and configuration without MCU participation. The power management unit provides automatic power-down modes to reduce standby current.","pin_description":"<table><tr><th>Pin Group<\/th><th>Pins<\/th><th>Function<\/th><\/tr><tr><td>Port A<\/td><td>ADIO0-ADIO7<\/td><td>Lower address\/data bus<\/td><\/tr><tr><td>Port B<\/td><td>ADIO8-ADIO15<\/td><td>Upper address\/data bus<\/td><\/tr><tr><td>Port C<\/td><td>PC0-PC7<\/td><td>PLD I\/O or MCU I\/O<\/td><\/tr><tr><td>Port D<\/td><td>PD0-PD3<\/td><td>ALE\/AS, CLKIN, CSI, WRH<\/td><\/tr><tr><td>Port E<\/td><td>PE0-PE7<\/td><td>JTAG or I\/O<\/td><\/tr><tr><td>Port F<\/td><td>PF0-PF7<\/td><td>External chip select or I\/O<\/td><\/tr><tr><td>Port G<\/td><td>PG0-PG7<\/td><td>Upper data bus or I\/O<\/td><\/tr><tr><td>Control<\/td><td>CNTL0-2<\/td><td>WR, RD, PSEN\/BHE<\/td><\/tr><\/table>","application_scenarios":"<ul><li>16-bit MCU system expansion with integrated memory, logic, and I\/O<\/li><li>Industrial controllers requiring JTAG field firmware updates<\/li><li>Legacy 8051\/68HC16 system upgrades with additional Flash and CPLD<\/li><li>Embedded applications needing address space expansion via page register<\/li><\/ul>","alternative_models":"<table><tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><\/tr><tr><td>PSD4335G2V-90U<\/td><td>ST<\/td><td>Larger 8Mbit primary Flash<\/td><\/tr><tr><td>PSD9135G2V-90U<\/td><td>ST<\/td><td>Smaller 1Mbit Flash variant<\/td><\/tr><tr><td>EPM3064ATC44<\/td><td>Intel\/Altera<\/td><td>64 macrocell CPLD only<\/td><\/tr><tr><td>XC9536XL-5VQ44<\/td><td>Xilinx<\/td><td>36 macrocell CPLD only<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/6544","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/comments?post=6544"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/posts\/6544\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/media?parent=6544"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/categories?post=6544"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/tags?post=6544"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=6544"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}