The PIC18F45K80-I\/PT from Microchip Technology is an 8-bit PIC18 MCU with integrated ECAN (CAN 2.0B) controller in a 44-pin TQFP package. Key specs include 32-KB Flash, 3648-B SRAM, 1024-B EEPROM, 64-MHz max clock (16 MIPS), 11-channel 12-bit ADC, 2 analog comparators, CTMU for touch sensing, 2 Enhanced USART, 1 MSSP (SPI\/I2C), 4 CCP + 1 ECCP PWM modules, and 5 timers. Operating voltage is 1.8 V to 5.5 V with nanoWatt XLP ultra-low-power sleep (20 nA). The ECAN module supports CAN 2.0B active with up to 8 transmit\/receive buffers. Industrial temperature range -40\u00b0C to +85\u00b0C.<\/p>","protected":false},"excerpt":{"rendered":"
The PIC18F45K80-I\/PT from Microchip Technology is an 8-bit PIC18 MCU with integrated ECAN (CAN 2.0B) controller in a 44-pin TQFP package. Key specs include 32-KB Flash, 3648-B SRAM, 1024-B EEPROM, 64-MHz max clock (16 MIPS), 11-channel 12-bit ADC, 2 analog comparators, CTMU for touch sensing, 2 Enhanced USART, 1 MSSP (SPI\/I2C), 4 CCP + 1 […]<\/p>\n","protected":false},"author":2,"featured_media":2876,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[14,13],"tags":[],"chip_brand":[134],"class_list":["post-2043","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-clock-timing-ics","category-integrated-circuits-ics","chip_brand-microchip"],"acf":{"brief_explanation":"8-bit PIC18 MCU, 32KB Flash, ECAN 2.0B, 12-bit ADC, CTMU, 1.8-5.5V, 20nA sleep, TQFP-44, -40~85\u00b0C","date_code":"","package_case":"TQFP-44 (10 x 10 x 1.0 mm, 0.8mm pitch)","in_stock":1750,"datasheet":"https:\/\/ww1.microchip.com\/downloads\/en\/DeviceDoc\/39977f.pdf","price":"$3.21 (100+ pcs)","product_introduction":"The PIC18F45K80-I\/PT is a member of Microchip's PIC18F66K80 family of 8-bit microcontrollers featuring an integrated ECAN controller conforming to the CAN 2.0B active specification. The '45' variant provides 44 pins with 35 I\/O, 32-KB Flash, 3648-B SRAM, and 1024-B EEPROM in a TQFP-44 package.\n\nThe ECAN module is the primary differentiator of this family. It supports CAN 2.0B active with standard (11-bit) and extended (29-bit) identifiers, up to 8 transmit and receive buffers, programmable bit rate up to 1 Mbit\/s, and deviceNet filtering. This makes the PIC18F45K80 suitable for automotive, industrial, and building automation CAN bus applications without requiring an external CAN controller or transceiver (a CAN transceiver IC such as MCP2551 or TJA1050 is still needed for physical layer).\n\nThe nanoWatt XLP (eXtreme Low Power) technology delivers 20-nA sleep current with all peripherals off and RAM retained, 300-nA WDT operation, and 3.8-\u00b5A active mode at 1 MHz\/1.8 V. The integrated 3.3-V LDO allows the device to operate from a 5-V rail while regulating the core to 3.3 V, reducing internal power consumption. The fast wake-up time (1 \u00b5s typical from sleep) enables duty-cycled battery operation.\n\nThe Charge Time Measurement Unit (CTMU) is a unique peripheral that measures capacitance changes with sub-picofarad resolution, enabling capacitive touch sensing, proximity detection, and precision time measurement without external components. Combined with the 12-bit ADC (11 channels) and two analog comparators, the PIC18F45K80 provides comprehensive analog capability for sensor interfaces.\n\nThe 64-MHz maximum clock (16 MIPS at 4:1 clock-to-MIPS ratio) provides adequate processing power for CAN message handling, sensor acquisition, and control loops. The 5 timers, 4 CCP modules, and 1 Enhanced CCP (with auto-shutdown and half\/full-bridge PWM) support precision timing and motor control applications.\n\nThe PIC18F45K80 is recommended for automotive design (special ordering codes for automotive-grade versions). The 'I' temperature grade supports -40\u00b0C to +85\u00b0C, and the '\/PT' suffix denotes the TQFP-44 package in tray packaging.","working_principle":"**PIC18 CPU Core:** The PIC18 core uses a 16-bit instruction word with a 2-stage pipeline. Most instructions execute in a single cycle (4 clock periods at the instruction clock rate of FOSC\/4). The 32-KB Flash stores up to 16,384 instructions. The 16-level hardware call\/return stack supports nested interrupts and subroutines. A hardware multiply instruction completes in one cycle.\n\n**ECAN Module:** The Enhanced CAN (ECAN) module implements the CAN 2.0B protocol. It includes a CAN protocol engine, message assembly\/disassembly logic, and up to 8 configurable transmit\/receive buffers. The module handles bit timing, CRC generation\/checking, error management, and bit stuffing automatically. Software configures baud rate, filter\/mask registers, and buffer priorities. The ECAN module operates independently of the CPU, allowing background CAN communication while the CPU executes application code.\n\n**nanoWatt XLP Power Management:** The power management module provides multiple low-power modes: Run (CPU + peripherals active), Idle (CPU off, peripherals on), Sleep (CPU and peripherals off, RAM retained, WDT optional). The on-chip LDO regulates the core voltage to 3.3 V from a 1.8-V to 5.5-V supply. The ultra-low-power sleep mode (20 nA) is achieved by disabling all oscillators, BOR, and WDT while maintaining SRAM content through a dedicated retention path.\n\n**CTMU (Charge Time Measurement Unit):** The CTMU generates a constant current source (0.55-550 \u00b5A programmable) that charges an external or internal capacitance. By measuring the time to reach a voltage threshold (via ADC or comparator), the capacitance value is determined. For touch sensing, finger proximity increases the sensor capacitance, which the CTMU detects as a longer charge time.","pin_description":"
| Pin Group<\/th> | Count<\/th> | Key Functions<\/th> | Notes<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Power (VDD\/VSS)<\/td> | 4 pairs<\/td> | 1.8-5.5V supply; multiple VDD\/VSS pairs for clean power; AVDD\/AVSS for analog<\/td> | Bypass each VDD with 0.1\u00b5F ceramic; AVDD powers ADC and comparators<\/td><\/tr> | ||||||||||||||||||||||||||||
| PORTA (RA0-RA7)<\/td> | 8<\/td> | ADC ch0-7 (12-bit); CTMU; comparator inputs; MCLR; T0CKI; oscillator pins<\/td> | RA6\/RA7 shared with primary oscillator; RA3 can be MCLR or digital input<\/td><\/tr> | ||||||||||||||||||||||||||||
| PORTB (RB0-RB7)<\/td> | 8<\/td> | Interrupt-on-change; CANRX\/CANTX (RB3\/RB2); ICSP\/ICD pins (RB6\/RB7); CCP modules<\/td> | RB6\/RB7 used for programming\/debug; RB2\/RB3 are default CAN pins<\/td><\/tr> | ||||||||||||||||||||||||||||
| PORTC (RC0-RC7)<\/td> | 8<\/td> | TIM1\/T1OSO; CCP1-3; ECCP1; MSSP (SDA\/SCL, SCK\/SDI\/SDO); USART1 TX\/RX<\/td> | RC3\/RC4 are I2C default; RC6\/RC7 are UART1 default<\/td><\/tr> | ||||||||||||||||||||||||||||
| PORTD (RD0-RD7)<\/td> | 8<\/td> | Parallel slave port; CCP4; USART2 TX\/RX; ECCP PWM outputs<\/td> | RD0-RD7 can be 8-bit parallel port for external bus interface<\/td><\/tr> | ||||||||||||||||||||||||||||
| PORTE (RE0-RE2)<\/td> | 3<\/td> | ADC ch8-10; MSSP (SCK\/SDI\/SDO alternate); parallel port control<\/td> | RE0-RE2 provide additional ADC channels and SPI alternate pins<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
|