{"id":7951,"date":"2026-06-28T06:01:51","date_gmt":"2026-06-28T06:01:51","guid":{"rendered":"https:\/\/materialparts.com\/sn74hc595n-3\/"},"modified":"2026-06-28T11:45:22","modified_gmt":"2026-06-28T11:45:22","slug":"sn74hc595n-3","status":"publish","type":"post","link":"https:\/\/materialparts.com\/es\/sn74hc595n-3\/","title":{"rendered":"SN74HC595N"},"content":{"rendered":"<h2>Productos<\/h2>\n<p>The SN74HC595N from Texas Instruments is an 8-bit serial-in\/parallel-out shift register with output latch and 3-state outputs, controllable via just 3 MCU pins, in a 16-pin PDIP package.<\/p>\n<h2>Especificaciones<\/h2>\n<table>\n<tr>\n<td>Funci\u00f3n<\/td>\n<td>8-bit shift register with output latch<\/td>\n<\/tr>\n<tr>\n<td>Logic Family<\/td>\n<td>HC (High-speed CMOS)<\/td>\n<\/tr>\n<tr>\n<td>Tensi\u00f3n de alimentaci\u00f3n<\/td>\n<td>2V to 6V<\/td>\n<\/tr>\n<tr>\n<td>Shift Clock Frequency<\/td>\n<td>52MHz typical @ 6V<\/td>\n<\/tr>\n<tr>\n<td>Output Type<\/td>\n<td>3-state (OE control)<\/td>\n<\/tr>\n<tr>\n<td>Output Drive<\/td>\n<td>\u00b16mA @ 6V<\/td>\n<\/tr>\n<tr>\n<td>Serial Data Input<\/td>\n<td>SER (pin 14)<\/td>\n<\/tr>\n<tr>\n<td>Shift Clock<\/td>\n<td>SRCLK (pin 11, rising edge)<\/td>\n<\/tr>\n<tr>\n<td>Latch Clock<\/td>\n<td>RCLK (pin 12, rising edge)<\/td>\n<\/tr>\n<tr>\n<td>Output Enable<\/td>\n<td>OE (pin 13, active LOW)<\/td>\n<\/tr>\n<tr>\n<td>Master Reset<\/td>\n<td>SRCLR (pin 10, active LOW)<\/td>\n<\/tr>\n<tr>\n<td>Cascade Output<\/td>\n<td>Q7&#8242; (pin 9, serial out for daisy-chain)<\/td>\n<\/tr>\n<tr>\n<td>Temperatura de funcionamiento<\/td>\n<td>-40\u00b0C to +85\u00b0C<\/td>\n<\/tr>\n<tr>\n<td>Paquete<\/td>\n<td>PDIP-16 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n<h2>Caracter\u00edsticas<\/h2>\n<ul>\n<li>8-bit serial-to-parallel conversion<\/li>\n<li>Separate shift and latch clocks<\/li>\n<li>3-state outputs for bus sharing<\/li>\n<li>Daisy-chainable via Q7&#8242; output<\/li>\n<li>Asynchronous master reset (SRCLR)<\/li>\n<li>Only 3 MCU pins needed for 8 outputs<\/li>\n<li>Wide supply range: 2V to 6V<\/li>\n<\/ul>\n<h2>Aplicaciones<\/h2>\n<ul>\n<li>LED matrix column\/row driver<\/li>\n<li>7-segment display multiplexing<\/li>\n<li>Expanding MCU output pins<\/li>\n<li>SPI-controlled parallel output<\/li>\n<li>Cascaded display chains<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The SN74HC595N from Texas Instruments is an 8-bit serial-in\/parallel-out shift register with output latch and 3-state outputs, controllable via just 3 MCU pins, in a 16-pin PDIP package. Key Specifications Function 8-bit shift register with output latch Logic Family HC (High-speed CMOS) Supply Voltage 2V to 6V Shift Clock Frequency 52MHz typical @ [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-7951","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"8-bit shift register with latch, 3-state, daisy-chain, PDIP-16","date_code":"","package_case":"PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":10000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74hc595.pdf","price":"$0.45 @ 1ku","product_introduction":"The SN74HC595N from Texas Instruments is an 8-bit serial-in\/parallel-out shift register with an output latch and 3-state outputs, allowing a microcontroller to control 8 (or more, via daisy-chaining) output lines using only 3 GPIO pins: SER (data), SRCLK (shift clock), and RCLK (latch clock). The shift register and output latch are separate: data shifts through the 8-bit register on each rising edge of SRCLK, but the outputs don't change until a rising edge on RCLK transfers the shift register contents to the output latch. This prevents output glitches during shifting. The Q7' output provides the serial data that overflows from the 8th stage, connecting to the SER input of the next 595 for daisy-chaining \u2014 with two 595s, 3 MCU pins control 16 outputs. The 3-state outputs (controlled by OE) allow multiple 595s to share an output bus. The master reset (SRCLR) clears the shift register asynchronously. The N suffix denotes the PDIP-16 through-hole package.","working_principle":"The SN74HC595N has two 8-bit registers: a shift register and an output (storage) register. On each rising edge of SRCLK, the serial data at SER is shifted into the first stage of the shift register, and all existing data shifts one position toward the output. After 8 clock cycles, the first bit shifted in appears at the last stage (Q7') ready for the next chip in a daisy chain. The shift register contents are NOT directly connected to the output pins. When a rising edge occurs on RCLK, the entire 8-bit shift register is copied to the output latch, and the 8 output pins (Q0-Q7) update simultaneously. This two-stage architecture prevents the outputs from flickering during the shifting process. The output enable (OE, active LOW) controls the 3-state output buffers: when OE is HIGH, all outputs are high-impedance; when LOW, the latched data drives the outputs. The master reset (SRCLR, active LOW) clears the shift register to all zeros without affecting the output latch. To send 8 bits: (1) Shift in all 8 bits via SER and SRCLK, (2) Pulse RCLK HIGH to latch, (3) Set OE LOW to enable outputs. For daisy-chaining: after shifting 16 bits through two chips (the first 8 bits end up in the second chip), pulse RCLK once to latch both chips simultaneously.","pin_description":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Description<\/th><\/tr>\n<tr><td>1<\/td><td>Q1<\/td><td>Output<\/td><td>Parallel output bit 1<\/td><\/tr>\n<tr><td>2<\/td><td>Q2<\/td><td>Output<\/td><td>Parallel output bit 2<\/td><\/tr>\n<tr><td>3<\/td><td>Q3<\/td><td>Output<\/td><td>Parallel output bit 3<\/td><\/tr>\n<tr><td>4<\/td><td>Q4<\/td><td>Output<\/td><td>Parallel output bit 4<\/td><\/tr>\n<tr><td>5<\/td><td>Q5<\/td><td>Output<\/td><td>Parallel output bit 5<\/td><\/tr>\n<tr><td>6<\/td><td>Q6<\/td><td>Output<\/td><td>Parallel output bit 6<\/td><\/tr>\n<tr><td>7<\/td><td>Q7<\/td><td>Output<\/td><td>Parallel output bit 7<\/td><\/tr>\n<tr><td>8<\/td><td>GND<\/td><td>Power<\/td><td>Ground<\/td><\/tr>\n<tr><td>9<\/td><td>Q7'<\/td><td>Output<\/td><td>Serial output (for daisy-chain to next SER)<\/td><\/tr>\n<tr><td>10<\/td><td>SRCLR<\/td><td>Input<\/td><td>Shift register clear (active LOW)<\/td><\/tr>\n<tr><td>11<\/td><td>SRCLK<\/td><td>Input<\/td><td>Shift register clock (rising edge)<\/td><\/tr>\n<tr><td>12<\/td><td>RCLK<\/td><td>Input<\/td><td>Storage register clock (rising edge, latch)<\/td><\/tr>\n<tr><td>13<\/td><td>OE<\/td><td>Input<\/td><td>Output enable (active LOW; HIGH = 3-state)<\/td><\/tr>\n<tr><td>14<\/td><td>SER<\/td><td>Input<\/td><td>Serial data input<\/td><\/tr>\n<tr><td>15<\/td><td>Q0<\/td><td>Output<\/td><td>Parallel output bit 0<\/td><\/tr>\n<tr><td>16<\/td><td>VCC<\/td><td>Power<\/td><td>Supply (2V to 6V)<\/td><\/tr>\n<\/table>","application_scenarios":"<ul>\n<li><strong>8-LED Control:<\/strong> MCU SPI \u2192 SER+SRCLK; 8 bits shifted in; RCLK pulse latches; 8 LEDs on Q0-Q7; only 3 pins used<\/li>\n<li><strong>Daisy Chain (16+ outputs):<\/strong> Q7' of first \u2192 SER of second; shift 16 bits; one RCLK pulse; 3 pins control 16+ outputs<\/li>\n<li><strong>7-Segment Display:<\/strong> 595 drives 7 segments + decimal point; multiplex with another 595 for digit select; 3 pins for 4+ digits<\/li>\n<li><strong>LED Matrix:<\/strong> Row 595 + Column 595; shift row and column data; 6 pins (3 per 595) control 8\u00d78=64 LEDs<\/li>\n<li><strong>Relay Board:<\/strong> 8 relays on Q0-Q7; 3 pins from MCU; ULN2803 between 595 and relay coils for current<\/li>\n<\/ul>","alternative_models":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><th>Package<\/th><th>Supply<\/th><\/tr>\n<tr><td>74HC595D<\/td><td>TI\/Nexperia<\/td><td>CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity<\/td><td>SOIC-16<\/td><td>2-6V CMOS<\/td><\/tr>\n<tr><td>74HC595N<\/td><td>TI\/Nexperia<\/td><td>Through-hole DIP version of HC family for prototyping and repair<\/td><td>DIP-16<\/td><td>2-6V CMOS<\/td><\/tr>\n<tr><td>74HCT595D<\/td><td>TI\/Nexperia<\/td><td>CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V<\/td><td>SOIC-16<\/td><td>4.5-5.5V TTL-in<\/td><\/tr>\n<tr><td>74HCT595N<\/td><td>TI\/Nexperia<\/td><td>Through-hole DIP version of HCT family for prototyping and repair<\/td><td>DIP-16<\/td><td>4.5-5.5V TTL-in<\/td><\/tr>\n<tr><td>74LVC595D<\/td><td>TI\/Nexperia<\/td><td>Low-voltage CMOS for 1.65-3.6V modern logic with 24mA output drive and bus-hold inputs<\/td><td>SOIC-16<\/td><td>1.65-3.6V CMOS<\/td><\/tr>\n<tr><td>74LVC595N<\/td><td>TI\/Nexperia<\/td><td>Through-hole DIP version of LVC family for prototyping and repair<\/td><td>DIP-16<\/td><td>1.65-3.6V CMOS<\/td><\/tr>\n<tr><td>74AUP595D<\/td><td>TI\/Nexperia<\/td><td>Ultra-low power CMOS with 0.8-3.6V supply for battery-powered and mobile applications<\/td><td>SOIC-16<\/td><td>0.8-3.6V CMOS<\/td><\/tr>\n<tr><td>74AUP595N<\/td><td>TI\/Nexperia<\/td><td>Through-hole DIP version of AUP family for prototyping and repair<\/td><td>DIP-16<\/td><td>0.8-3.6V CMOS<\/td><\/tr>\n<\/table>\n<p>The 74595 is a 8-Bit Shift Register with Output Latches and 3-State Output. Family variants span from the original LS TTL (5V only) to modern LVC\/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/7951","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/comments?post=7951"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/7951\/revisions"}],"predecessor-version":[{"id":8175,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/7951\/revisions\/8175"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/media?parent=7951"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/categories?post=7951"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/tags?post=7951"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/chip_brand?post=7951"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}