{"id":3311,"date":"2026-06-01T00:45:32","date_gmt":"2026-06-01T00:45:32","guid":{"rendered":"https:\/\/materialparts.com\/ad9648bcpz-105\/"},"modified":"2026-06-01T00:45:32","modified_gmt":"2026-06-01T00:45:32","slug":"ad9648bcpz-105","status":"publish","type":"post","link":"https:\/\/materialparts.com\/es\/ad9648bcpz-105\/","title":{"rendered":"AD9648BCPZ-105"},"content":{"rendered":"<h2>Productos<\/h2>\n<p>The AD9648BCPZ-105 from Analog Devices is a 14-bit, 105 MSPS dual-channel analog-to-digital converter (ADC) operating from a single 1.8V supply. It features a high-performance sample-and-hold circuit with 650MHz analog input bandwidth, an on-chip voltage reference, and supports both CMOS and LVDS output logic. The device achieves 74.5 dBFS SNR and 91 dBc SFDR at 70MHz input, making it ideal for communications and imaging applications. The -105 suffix indicates the 105 MSPS speed grade, packaged in a 64-lead LFCSP.<\/p>\n<h2>Especificaciones<\/h2>\n<table>\n<tr>\n<td>Resolution<\/td>\n<td>14 bits<\/td>\n<\/tr>\n<tr>\n<td>Sample Rate<\/td>\n<td>105 MSPS<\/td>\n<\/tr>\n<tr>\n<td>Canales<\/td>\n<td>2 (dual-channel)<\/td>\n<\/tr>\n<tr>\n<td>Analog Bandwidth<\/td>\n<td>650 MHz<\/td>\n<\/tr>\n<tr>\n<td>SNR<\/td>\n<td>74.5 dBFS @ 70MHz<\/td>\n<\/tr>\n<tr>\n<td>SFDR<\/td>\n<td>91 dBc @ 70MHz<\/td>\n<\/tr>\n<tr>\n<td>Power Consumption<\/td>\n<td>78mW\/channel (core) @ 125MSPS<\/td>\n<\/tr>\n<tr>\n<td>Tensi\u00f3n de alimentaci\u00f3n<\/td>\n<td>1.8V (AVDD) + 1.8V (DRVDD)<\/td>\n<\/tr>\n<tr>\n<td>Input Range<\/td>\n<td>2V p-p differential<\/td>\n<\/tr>\n<tr>\n<td>Paquete<\/td>\n<td>64-lead LFCSP (9x9mm)<\/td>\n<\/tr>\n<\/table>\n<h2>Caracter\u00edsticas<\/h2>\n<ul>\n<li>1.8V single analog supply operation<\/li>\n<li>1.8V CMOS or LVDS digital outputs<\/li>\n<li>On-chip voltage reference and sample-and-hold<\/li>\n<li>SNR of 74.5 dBFS and SFDR of 91 dBc at 70MHz input<\/li>\n<li>IF sampling capability up to 200MHz<\/li>\n<li>Serial port interface (SPI) for configuration<\/li>\n<li>Programmable clock divider (1-to-8) and duty cycle stabilizer<\/li>\n<li>Data output multiplex option<\/li>\n<li>PIN-compatible with AD9650 (16-bit) and AD9628 (12-bit) family<\/li>\n<\/ul>\n<h2>Aplicaciones<\/h2>\n<ul>\n<li>Communications and diversity radio receivers<\/li>\n<li>Multi-mode digital receivers (LTE, WCDMA, CDMA2000)<\/li>\n<li>I\/Q demodulation systems<\/li>\n<li>Ultrasound and medical imaging<\/li>\n<li>Radar and LIDAR systems<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The AD9648BCPZ-105 from Analog Devices is a 14-bit, 105 MSPS dual-channel analog-to-digital converter (ADC) operating from a single 1.8V supply. It features a high-performance sample-and-hold circuit with 650MHz analog input bandwidth, an on-chip voltage reference, and supports both CMOS and LVDS output logic. The device achieves 74.5 dBFS SNR and 91 dBc SFDR [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[19,13],"tags":[],"chip_brand":[165],"class_list":["post-3311","post","type-post","status-publish","format-standard","hentry","category-analog-linear-ics","category-integrated-circuits-ics","chip_brand-adi"],"acf":{"brief_explanation":"14-bit 105MSPS dual ADC, 1.8V, 74.5dBFS SNR, LVDS\/CMOS, LFCSP-64","date_code":"","package_case":"64-lead LFCSP (9 x 9 x 0.75 mm, 0.5mm pitch, exposed pad)","in_stock":11674,"datasheet":"https:\/\/www.analog.com\/media\/en\/technical-documentation\/data-sheets\/AD9648.pdf","price":"$28.50 @ 1ku","product_introduction":"The AD9648BCPZ-105 from Analog Devices is a dual-channel 14-bit 105 MSPS ADC designed for high-performance communications and imaging applications. Built on a multi-stage differential pipeline architecture with output error correction, it guarantees no missing codes across the full temperature range. The device integrates a high-performance sample-and-hold circuit with 650MHz input bandwidth, enabling direct IF sampling up to 200MHz. The SPI interface provides flexible configuration including data format selection, internal clock division, power-down modes, and programmable DCO timing. The dual-channel architecture supports diversity reception and I\/Q demodulation, while the pin-compatible family (AD9650 16-bit, AD9628 12-bit) enables easy resolution migration without PCB changes.","working_principle":"The AD9648 uses a multi-stage pipelined ADC architecture where each stage performs a coarse quantization and generates a residue for the next stage. The first stage samples the analog input using a differential switched-capacitor circuit, while subsequent stages amplify and quantize the residue from the previous stage. One bit of redundancy per stage facilitates digital correction of comparator errors in the preceding stage, ensuring 14-bit accuracy with no missing codes. The digital correction logic aligns and combines outputs from all stages into the final 14-bit result. The output staging block provides data clock output (DCO) for proper latch timing and supports optional data multiplexing. An optional duty cycle stabilizer (DCS) compensates for clock duty cycle variations. The 3-wire SPI interface allows access to internal registers for configuration, calibration, and test pattern generation.","pin_description":"<table><tr><th>Pin Group<\/th><th>Count<\/th><th>Type<\/th><th>Function<\/th><\/tr><tr><td>AVDD<\/td><td>8<\/td><td>Power<\/td><td>1.8V analog supply<\/td><\/tr><tr><td>DRVDD<\/td><td>4<\/td><td>Power<\/td><td>1.8V digital output supply<\/td><\/tr><tr><td>AGND<\/td><td>6<\/td><td>Ground<\/td><td>Analog ground<\/td><\/tr><tr><td>DRGND<\/td><td>4<\/td><td>Ground<\/td><td>Digital ground<\/td><\/tr><tr><td>VIN+A\/VIN-A<\/td><td>2<\/td><td>Analog Input<\/td><td>Channel A differential analog input<\/td><\/tr><tr><td>VIN+B\/VIN-B<\/td><td>2<\/td><td>Analog Input<\/td><td>Channel B differential analog input<\/td><\/tr><tr><td>CLK+\/CLK-<\/td><td>2<\/td><td>Input<\/td><td>Differential clock input<\/td><\/tr><tr><td>D0A-D13A<\/td><td>14<\/td><td>Output<\/td><td>Channel A data output (CMOS or LVDS)<\/td><\/tr><tr><td>D0B-D13B<\/td><td>14<\/td><td>Output<\/td><td>Channel B data output (CMOS or LVDS)<\/td><\/tr><tr><td>DCO<\/td><td>2<\/td><td>Output<\/td><td>Data clock output per channel<\/td><\/tr><tr><td>SPI<\/td><td>3<\/td><td>I\/O<\/td><td>SDIO, SCLK, CSB serial interface<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Diversity radio receivers in cellular base stations (LTE, 5G)<\/li><li>I\/Q demodulation systems for software-defined radio<\/li><li>Ultrasound medical imaging with simultaneous channel sampling<\/li><li>Radar and LIDAR signal digitization with wide bandwidth<\/td><\/tr><tr><td>Portable test equipment and handheld oscilloscopes<\/td><\/tr><\/table>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>ADI<\/td><td>AD9648BCPZ-125<\/td><td>LFCSP-64<\/td><td>125 MSPS speed grade, pin compatible<\/td><\/tr><tr><td>ADI<\/td><td>AD9650BCPZ-105<\/td><td>LFCSP-64<\/td><td>16-bit, 105 MSPS, pin compatible upgrade<\/td><\/tr><tr><td>ADI<\/td><td>AD9628BCPZ-125<\/td><td>LFCSP-64<\/td><td>12-bit, 125 MSPS, pin compatible, lower cost<\/td><\/tr><tr><td>TI<\/td><td>ADC3421<\/td><td>QFN-48<\/td><td>14-bit, 125MSPS, quad channel<\/td><\/tr><tr><td>Renesas<\/td><td>R2A15120FP<\/td><td>QFP-80<\/td><td>14-bit, 125MSPS, dual channel ADC<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/3311","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/comments?post=3311"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/3311\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/media?parent=3311"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/categories?post=3311"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/tags?post=3311"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/chip_brand?post=3311"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}