{"id":2539,"date":"2026-05-23T06:10:34","date_gmt":"2026-05-23T06:10:34","guid":{"rendered":"https:\/\/materialparts.com\/isplsi1032e-70ljn\/"},"modified":"2026-05-23T06:10:34","modified_gmt":"2026-05-23T06:10:34","slug":"isplsi1032e-70ljn","status":"publish","type":"post","link":"https:\/\/materialparts.com\/es\/isplsi1032e-70ljn\/","title":{"rendered":"ISPLSI1032E-70LJN"},"content":{"rendered":"

Productos<\/h2>\n

The ISPLSI1032E-70LJN from Lattice Semiconductor is a high-density in-system programmable CPLD with 128 macrocells, 64 I\/Os, and 70MHz internal frequency in an 84-lead PLCC package. It provides 6000 usable gates with 7.5ns propagation delay for complex logic implementation.<\/p>\n

Especificaciones<\/h2>\n\n\n\n\n\n\n\n\n\n
Macrocells<\/td>\n128<\/td>\n<\/tr>\n
I\/O Pins<\/td>\n64<\/td>\n<\/tr>\n
Usable Gates<\/td>\n6000<\/td>\n<\/tr>\n
Retardo de propagaci\u00f3n<\/td>\n7.5ns (speed grade -70)<\/td>\n<\/tr>\n
Internal Frequency<\/td>\n70MHz<\/td>\n<\/tr>\n
Tensi\u00f3n de alimentaci\u00f3n<\/td>\n4.75V ~ 5.25V<\/td>\n<\/tr>\n
Temperatura de funcionamiento<\/td>\n0\u00b0C ~ 70\u00b0C<\/td>\n<\/tr>\n
Paquete<\/td>\n84-PLCC (LCC)<\/td>\n<\/tr>\n<\/table>\n

Caracter\u00edsticas<\/h2>\n
    \n
  • In-system programmable via JTAG\/ISP<\/li>\n
  • 128 macrocells with flexible logic blocks<\/li>\n
  • 64 user I\/O pins with programmable I\/O standards<\/li>\n
  • Global routing pool for inter-GLB connectivity<\/li>\n
  • CMOS EEPROM technology for non-volatile configuration<\/li>\n
  • Boundary scan test support (IEEE 1149.1)<\/li>\n<\/ul>\n

    Aplicaciones<\/h2>\n
      \n
    • Glue logic and address decoding<\/li>\n
    • Bus interface and protocol conversion<\/li>\n
    • Control industrial y automatizaci\u00f3n<\/li>\n
    • Telecommunications equipment<\/li>\n
    • Legacy system replacement and upgrades<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The ISPLSI1032E-70LJN from Lattice Semiconductor is a high-density in-system programmable CPLD with 128 macrocells, 64 I\/Os, and 70MHz internal frequency in an 84-lead PLCC package. It provides 6000 usable gates with 7.5ns propagation delay for complex logic implementation. Key Specifications Macrocells 128 I\/O Pins 64 Usable Gates 6000 Propagation Delay 7.5ns (speed grade […]<\/p>\n","protected":false},"author":2,"featured_media":2576,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13],"tags":[],"chip_brand":[188],"class_list":["post-2539","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-integrated-circuits-ics","chip_brand-lattice"],"acf":{"brief_explanation":"128-macrocell CPLD, 64 I\/Os, 7.5ns, 70MHz, 84-PLCC, 5V ISP","date_code":"","package_case":"84-PLCC (LCC) (29.2 x 29.2 mm)","in_stock":4210,"datasheet":"https:\/\/www.latticesemi.com\/en\/Products\/CPLDDevices\/ispLSI1032E","price":"","product_introduction":"The ISPLSI1032E-70LJN is a high-density Complex Programmable Logic Device (CPLD) from Lattice Semiconductor, featuring 128 macrocells organized into 8 Generic Logic Blocks (GLBs). With 6000 usable gates and 64 I\/O pins, it offers ample resources for mid-range logic designs. The device uses CMOS EEPROM technology, retaining configuration without external memory. In-system programmability allows field updates via JTAG interface. The 70MHz internal frequency and 7.5ns propagation delay support moderately high-speed logic operations in industrial and communications applications.","working_principle":"The ISPLSI1032E architecture centers on 8 Generic Logic Blocks (GLBs), each containing 16 macrocells. Each macrocell includes a programmable AND\/OR array, configurable flip-flop, and output enable control. GLBs are interconnected through a Global Routing Pool (GRP) that provides signal paths between any GLB and any I\/O cell. The Output Routing Pool (ORP) connects GLB outputs to I\/O pins with flexible routing. Configuration data is stored in on-chip EEPROM cells, which are programmed via the JTAG interface. The device supports both synchronous and asynchronous design methodologies.","pin_description":"
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>
      1-13<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      14<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>
      15-27<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      28<\/td>VCC<\/td>Power<\/td>+5V Supply<\/td><\/tr>
      29-41<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      42<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>
      43-55<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      56<\/td>VCC<\/td>Power<\/td>+5V Supply<\/td><\/tr>
      57-69<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      70<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>
      71-83<\/td>I\/O<\/td>I\/O<\/td>User-programmable I\/O<\/td><\/tr>
      84<\/td>VCC<\/td>Power<\/td>+5V Supply<\/td><\/tr><\/table>","application_scenarios":"
      • Glue logic and address decoding in microprocessor systems<\/li>
      • Bus bridging and protocol conversion<\/li>
      • Industrial control state machines<\/li>
      • Telecommunications board-level logic<\/td><\/tr>
      • Legacy ASIC and TTL replacement<\/li><\/ul>","alternative_models":"
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>
        Lattice<\/td>ISPLSI1032E-70LJI<\/td>84-PLCC<\/td>Industrial temp version<\/td><\/tr>
        Intel\/Altera<\/td>EPM7128SQC100-7<\/td>100-PQFP<\/td>128 macrocell CPLD<\/td><\/tr>
        Xilinx<\/td>XC95108PC84I<\/td>84-PLCC<\/td>108 macrocell, 5V<\/td><\/tr>
        Lattice<\/td>M4A5-128\/64-7VC<\/td>84-PLCC<\/td>Modern MachXO alternative<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/2539","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/comments?post=2539"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/posts\/2539\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/media\/2576"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/media?parent=2539"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/categories?post=2539"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/tags?post=2539"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/es\/wp-json\/wp\/v2\/chip_brand?post=2539"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}