The MP1484EN-LF-Z from Monolithic Power Systems (MPS) is a 3 A, 18 V, 340 kHz synchronous step-down converter in an 8-pin SOIC package with exposed pad. It integrates 85 m\u03a9 top and bottom MOSFETs, supports 4.75 V to 18 V input, and provides adjustable output from 0.925 V to 20 V. Current-mode control ensures fast transient response and cycle-by-cycle current limit. Features include programmable soft-start, shutdown current below 1 \u00b5A, and up to 95% efficiency. The -LF-Z suffix denotes lead-free tape-and-reel packaging. Operating temperature range is -20\u00b0C to +85\u00b0C.<\/p>","protected":false},"excerpt":{"rendered":"
The MP1484EN-LF-Z from Monolithic Power Systems (MPS) is a 3 A, 18 V, 340 kHz synchronous step-down converter in an 8-pin SOIC package with exposed pad. It integrates 85 m\u03a9 top and bottom MOSFETs, supports 4.75 V to 18 V input, and provides adjustable output from 0.925 V to 20 V. Current-mode control ensures fast […]<\/p>\n","protected":false},"author":2,"featured_media":2266,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[31,13],"tags":[],"chip_brand":[172],"class_list":["post-2059","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-dc-dc-converters","category-integrated-circuits-ics","chip_brand-mps"],"acf":{"brief_explanation":"3A sync buck converter, 4.75-18V in, 0.925-20V out, 340kHz, 85m\u03a9 FETs, 95% eff, SOIC-8 EP, NRND","date_code":"","package_case":"SOIC-8 EP (5.0 x 4.0 x 1.5 mm, 1.27mm pitch, exposed pad)","in_stock":0,"datasheet":"https:\/\/www.monolithicpower.com\/en\/documentview\/productdocument\/index\/version\/2\/document_type\/Datasheet\/lang\/en\/sku\/MP1484\/document_id\/201","price":"$1.66 (2.5K+ pcs)","product_introduction":"The MP1484 from MPS is a monolithic synchronous buck regulator integrating 85 m\u03a9 top and bottom MOSFETs in a thermally enhanced SOIC-8 EP package. The MP1484EN-LF-Z is the lead-free tape-and-reel version. It delivers 3 A continuous output current from a 4.75 V to 18 V input with output adjustable from 0.925 V to 20 V.\n\nThe device uses peak current-mode control with internal slope compensation, providing fast line and load transient response, easy loop compensation, and inherent cycle-by-cycle current limiting. The 0.925 V feedback reference voltage with \u00b12.7% accuracy over temperature allows precision output regulation.\n\nThe integrated synchronous rectifier eliminates the external Schottky catch diode, improving efficiency especially at low output voltages. Up to 95% efficiency is achievable at 12 V input, 3.3 V output, 2 A load.\n\nThe programmable soft-start (CSS pin) prevents inrush current by slowly ramping the output voltage. The EN pin provides logic-level shutdown with supply current dropping below 1 \u00b5A.\n\nThe MP1484 is pin-compatible with the MP1482 (2 A version), offering a simple upgrade path for higher current designs.\n\nImportant: MPS designates the MP1484 as \"Not Recommended for New Designs\" (NRND). The recommended replacement is the MP2307DN-LF, which offers similar performance in a smaller package. Designers should verify availability before using the MP1484 in new designs.","working_principle":"**Synchronous Buck Topology:** The MP1484 uses a synchronous buck converter architecture with an integrated high-side NMOS switch and low-side NMOS synchronous rectifier. During the on-time, the high-side switch connects VIN to the inductor, storing energy in the inductor's magnetic field. During the off-time, the high-side switch opens and the low-side switch turns on, providing a path for inductor current to continue flowing to the output.\n\n**Current-Mode Control:** The inner current loop compares the peak inductor current (sensed through the high-side switch) against the error amplifier output. This provides cycle-by-cycle current limiting and simplifies loop compensation. Internal slope compensation prevents sub-harmonic oscillation at duty cycles above 50%.\n\n**Bootstrap Supply:** The BS pin provides gate drive voltage for the high-side NMOS switch. An external bootstrap capacitor (0.1 \u00b5F) between BS and SW is charged during the off-time when SW is near ground, then provides the voltage above SW needed to drive the high-side gate during on-time.\n\n**Soft-Start:** The SS pin sources a current to charge an external capacitor, creating a voltage ramp that limits the error amplifier output during startup, preventing inrush current and output overshoot.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | BS<\/td> | P<\/td> | Bootstrap supply for high-side gate driver; connect 0.1\u00b5F ceramic cap from BS to SW; charged during off-time<\/td><\/tr> | ||||||||||||||||||||||
| 2<\/td> | IN<\/td> | P<\/td> | Input supply; 4.75-18V operating; bypass with 4.7\u00b5F ceramic to GND; 24V absolute max<\/td><\/tr> | ||||||||||||||||||||||
| 3<\/td> | SW<\/td> | O<\/td> | Switch node; connects to inductor; 85m\u03a9 internal MOSFETs; do not route sensitive traces near this node<\/td><\/tr> | ||||||||||||||||||||||
| 4<\/td> | GND<\/td> | G<\/td> | Ground; connect to PCB ground plane; exposed pad must be soldered to ground plane for thermal performance<\/td><\/tr> | ||||||||||||||||||||||
| 5<\/td> | FB<\/td> | I<\/td> | Feedback input; 0.925V reference; connect resistor divider from VOUT; VOUT = 0.925 x (1 + R1\/R2)<\/td><\/tr> | ||||||||||||||||||||||
| 6<\/td> | COMP<\/td> | I\/O<\/td> | Compensation; output of transconductance error amplifier; connect series RC from COMP to GND for loop stability<\/td><\/tr> | ||||||||||||||||||||||
| 7<\/td> | EN<\/td> | I<\/td> | Enable; active-high; pull above 2V to enable; pull below 0.4V to shutdown; IQ < 1\u00b5A in shutdown; do not float<\/td><\/tr> | ||||||||||||||||||||||
| 8<\/td> | SS<\/td> | I<\/td> | Soft-start; connect external capacitor to GND; larger cap = slower startup; 10nA charge current; leave open for minimum soft-start<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
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