El ADM2687EBRIZ de Analog Devices es un transceptor RS-485\/RS-422 aislado de se\u00f1al y alimentaci\u00f3n de 5 kVrms totalmente integrado en un encapsulado SOIC de cuerpo ancho de 16 terminales con m\u00e1s de 8 mm de fuga y espacio libre. Integra la tecnolog\u00eda iCoupler de ADI, que combina un aislador digital de 3 canales, un controlador de l\u00ednea diferencial de tres estados, un receptor de entrada diferencial y un convertidor CC-CC aislado isoPower en un \u00fanico encapsulado, que s\u00f3lo requiere una alimentaci\u00f3n de 3,3 V o 5 V. Especificaciones principales: velocidad de transmisi\u00f3n de datos de 500 kbps, configuraci\u00f3n semid\u00faplex o d\u00faplex completo, hasta 256 nodos en un bus, protecci\u00f3n ESD de m\u00e1s\/menos 15 kV en las patillas del bus, inmunidad a transitorios en modo com\u00fan superior a 25 kV\/us, entradas del receptor a prueba de fallos por cortocircuito y apertura. El convertidor isoPower elimina la necesidad de una fuente DC-DC externa aislada. La limitaci\u00f3n de corriente y el apagado t\u00e9rmico protegen contra cortocircuitos de salida y contenci\u00f3n de bus. Homologaciones de seguridad: UL 1577 (5000Vrms durante 1 minuto), IEC\/CSA 62368-1, IEC\/CSA 60601-1, IEC\/CSA 61010-1. Temperatura de funcionamiento: -40C a 85C. Conforme a RoHS, EAR99.<\/p>","protected":false},"excerpt":{"rendered":"
The ADM2687EBRIZ from Analog Devices is a fully integrated 5 kVrms signal and power isolated RS-485\/RS-422 transceiver in a 16-lead wide-body SOIC package with greater than 8mm creepage and clearance. It integrates ADI iCoupler technology combining a 3-channel digital isolator, a three-state differential line driver, a differential input receiver, and an isoPower isolated DC-DC converter […]<\/p>\n","protected":false},"author":2,"featured_media":2853,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[165],"class_list":["post-1905","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-adi"],"acf":{"brief_explanation":"5kVrms isolated RS-485\/422 transceiver, 500kbps, isoPower integrated DC-DC, +\/-15kV ESD, SOIC-16, -40~85C","date_code":"","package_case":"16-Lead Wide-Body SOIC_IC (RI-16-2) (10.3 x 7.5 mm, >8mm creepage)","in_stock":69,"datasheet":"https:\/\/www.analog.com\/media\/en\/technical-documentation\/data-sheets\/ADM2682E_2687E.pdf","price":"$10.15 (1K+ pcs)","product_introduction":"The ADM2687EBRIZ from Analog Devices is a fully integrated 5 kVrms signal and power isolated RS-485\/RS-422 transceiver, representing one of the most highly integrated isolated communication solutions available. The device combines ADI proprietary iCoupler digital isolation technology with their isoPower isolated DC-DC converter technology to deliver complete signal and power isolation in a single 16-lead wide-body SOIC package, eliminating the need for any external isolation components.\n\nThe ADM2687E is the 500kbps data rate variant of the ADM268xE family. The ADM2682E is the 16Mbps high-speed variant with identical functionality but faster data rates. Both share the same package, pinout, and isolation specifications, differing only in the maximum data rate and corresponding supply current.\n\nThe device integrates five key functional blocks into one package: (1) A 3-channel iCoupler digital isolator that provides galvanic isolation for the data and control signals (TxD, RxD, DE, RE) between the logic side and bus side; (2) A three-state differential RS-485 line driver with active-high enable (DE pin); (3) A differential input RS-485 receiver with active-low enable (RE pin) and fail-safe biasing for open and short circuit conditions; (4) An isoPower isolated DC-DC converter that generates the isolated bus-side power supply from the logic-side VCC, eliminating the need for an external isolated power supply; (5) Voltage regulation and protection circuits including current limiting and thermal shutdown.\n\nThe device operates from a single 3.3V or 5V supply on the logic side. The internal isoPower converter generates an isolated 3.3V or 5V supply (depending on VCC) for the bus-side transceiver circuitry. The VISOOUT pin must be externally connected to the VISOIN pin to complete the isolated power loop. Bypass capacitors are required on both the logic side (0.01uF and 0.1uF on VCC Pin 2, 0.1uF and 10uF on VCC Pin 7) and the bus side (0.1uF and 10uF on VISOOUT, 0.01uF and 0.1uF on VISOIN) for proper noise suppression and voltage regulation.\n\nThe RS-485 transceiver complies with ANSI\/TIA\/EIA-485-A-98 and ISO 8482:1987(E) standards. It supports up to 256 nodes on a single bus. The receiver inputs feature fail-safe biasing that guarantees a logic HIGH output when the inputs are open or shorted, preventing erroneous data reception on an idle bus. The driver outputs provide plus\/minus 15kV ESD protection (Human Body Model) on the A, B, Y, and Z bus pins.\n\nThe common-mode transient immunity exceeds 25 kV\/us, making the device highly robust in noisy industrial environments with fast switching transients (motor drives, inverters, welding equipment). The 5 kVrms isolation rating provides reinforced insulation for applications requiring high-voltage safety isolation.\n\nThe wide-body SOIC package (10.3 x 7.5 mm) provides greater than 8mm creepage and clearance between the logic and bus sides, meeting the spacing requirements for 5000Vrms isolation in safety-critical applications. The package is designed for surface-mount assembly with standard 1.27mm pin pitch. The BRI suffix denotes the wide-body SOIC package, and the Z suffix indicates RoHS compliance.","working_principle":"The ADM2687EBRIZ operates as a fully integrated isolated RS-485\/RS-422 transceiver, combining signal isolation, power isolation, and bus transceiver functions in a single package.\n\nSignal Isolation (iCoupler): The iCoupler digital isolation technology uses chip-scale microtransformers fabricated directly on the semiconductor die to couple digital signals across the isolation barrier. The input data signals (TxD, DE, RE) are encoded into high-frequency pulses that drive the primary windings of the microtransformers. The secondary windings receive the coupled pulses, which are decoded back to the original digital signals. The 3-channel isolator provides three independent isolation channels: one for transmit data (TxD to Y\/Z), one for receive data (A\/B to RxD), and one for control signals (DE and RE). The isolation barrier provides 5 kVrms galvanic isolation with common-mode transient immunity exceeding 25 kV\/us.\n\nPower Isolation (isoPower): The isoPower DC-DC converter uses high-frequency switching (approximately 180 MHz) to transfer power across chip-scale transformers from the logic side to the bus side. The converter takes the logic-side VCC supply (3.3V or 5V) and generates an isolated supply (VISOOUT) at the same nominal voltage for the bus-side transceiver circuitry. The VISOOUT pin must be externally connected to the VISOIN pin to supply power to the bus-side circuitry. This eliminates the need for an external isolated power supply, significantly simplifying system design and reducing component count. The high switching frequency enables the use of very small transformer structures that fit within the IC package, but requires careful PCB layout to control radiated emissions (refer to AN-0971).\n\nRS-485 Transmitter: The differential line driver takes the isolated TxD signal and drives the Y (non-inverting) and Z (inverting) outputs when DE is HIGH. When DE is LOW, the driver outputs are high-impedance (tri-stated). The driver provides current-limited output with typical short-circuit current of 200mA. The differential output voltage is at least 1.5V with a 54-ohm load between Y and Z. In full-duplex mode, the Y and Z pins serve as dedicated driver outputs.\n\nRS-485 Receiver: The differential receiver monitors the A (non-inverting) and B (inverting) input pins when RE is LOW. The receiver output (RxD) goes HIGH when (A-B) is greater than -30mV and LOW when (A-B) is less than -200mV. Between -200mV and -30mV, the output state is indeterminate. When RE is HIGH, the receiver output is tri-stated. The fail-safe biasing ensures the receiver output defaults to HIGH when the inputs are open (no connection) or shorted together, preventing reception of noise on an idle bus. In full-duplex mode, A and B serve as dedicated receiver inputs.\n\nHalf-Duplex vs Full-Duplex: The device can be configured for either mode through external pin connections. In full-duplex mode, the driver outputs (Y, Z) and receiver inputs (A, B) are connected to separate differential pairs on the bus cable (4-wire + ground). In half-duplex mode, Y is connected to A and Z is connected to B externally, sharing a single differential pair (2-wire + ground). The DE and RE pins control the direction of data flow, with the device transmitting when DE=HIGH and receiving when RE=LOW.\n\nThermal and Current Protection: The device includes current limiting on the driver outputs that activates when the output current exceeds approximately 200mA (short-circuit condition). A thermal shutdown circuit disables the driver when the junction temperature exceeds approximately 150C, protecting the device from damage during sustained fault conditions such as bus contention where multiple drivers are active simultaneously.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Side<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | GND1<\/td> | Power<\/td> | Logic<\/td> | Logic side ground; connect to logic-side ground plane; use enlarged pad and multiple vias for thermal dissipation<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 2<\/td> | VCC<\/td> | Power<\/td> | Logic<\/td> | Logic side power supply (3.0V to 5.5V); fit 0.01uF and 0.1uF decoupling capacitors between Pin 2 and Pin 1 (GND1)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 3<\/td> | RxD<\/td> | Output<\/td> | Logic<\/td> | Receiver data output; HIGH when A-B > -30mV; LOW when A-B < -200mV; tri-stated when RE is HIGH; drives CMOS\/TTL logic inputs<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 4<\/td> | RE<\/td> | Input<\/td> | Logic<\/td> | Receiver enable (active LOW); LOW enables receiver and drives RxD; HIGH tri-states RxD; connect to DE complement for half-duplex direction control<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 5<\/td> | DE<\/td> | Input<\/td> | Logic<\/td> | Driver enable (active HIGH); HIGH enables driver, driving Y and Z outputs; LOW tri-states driver outputs; connect to RE complement for half-duplex<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 6<\/td> | TxD<\/td> | Input<\/td> | Logic<\/td> | Transmitter data input; data applied here appears on Y (non-inverted) and Z (inverted) when DE is HIGH; CMOS\/TTL compatible<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 7<\/td> | VCC<\/td> | Power<\/td> | Logic<\/td> | Logic side power supply (3.0V to 5.5V); fit 0.1uF and 10uF decoupling capacitors between Pin 7 and Pin 8 (GND1)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 8<\/td> | GND1<\/td> | Power<\/td> | Logic<\/td> | Logic side ground; connect to logic-side ground plane; use enlarged pad and multiple vias for thermal dissipation<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 9<\/td> | GND2<\/td> | Power<\/td> | Bus<\/td> | Bus side ground; connect to bus-side ground plane; must NOT be connected to GND1; use enlarged pad and multiple vias<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 10<\/td> | VISOOUT<\/td> | Power<\/td> | Bus<\/td> | Isolated power supply output; must be externally connected to VISOIN (Pin 15); fit 0.1uF and 10uF reservoir capacitors between Pin 10 and Pin 9 (GND2)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 11<\/td> | Y<\/td> | Output<\/td> | Bus<\/td> | Driver non-inverting output; connects to RS-485 bus (+) line; in half-duplex, externally connect to A (Pin 14)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 12<\/td> | Z<\/td> | Output<\/td> | Bus<\/td> | Driver inverting output; connects to RS-485 bus (-) line; in half-duplex, externally connect to B (Pin 13)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 13<\/td> | B<\/td> | Input<\/td> | Bus<\/td> | Receiver inverting input; connects to RS-485 bus (-) line; in half-duplex, externally connect to Z (Pin 12)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 14<\/td> | A<\/td> | Input<\/td> | Bus<\/td> | Receiver non-inverting input; connects to RS-485 bus (+) line; in half-duplex, externally connect to Y (Pin 11)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 15<\/td> | VISOIN<\/td> | Power<\/td> | Bus<\/td> | Isolated power supply input; must be externally connected to VISOOUT (Pin 10); fit 0.01uF and 0.1uF decoupling capacitors between Pin 15 and Pin 16 (GND2)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 16<\/td> | GND2<\/td> | Power<\/td> | Bus<\/td> | Bus side ground; connect to bus-side ground plane; must NOT be connected to GND1; use enlarged pad and multiple vias<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
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