The TPS23751PWPR from Texas Instruments is an integrated IEEE 802.3at PoE Powered Device (PD) interface and current-mode flyback DC-DC controller in a 16-pin HTSSOP package with PowerPAD. The device supports both 802.3at Type 2 (25.5W) and 802.3af Type 1 (13W) PoE standards, featuring an internal 0.5-ohm 100V hotswap MOSFET that eliminates the need for an external pass transistor. The PoE interface implements type-2 hardware classification, detection signature, and auxiliary power detect (APD) for adapter ORing. The DC-DC controller provides current-mode control with slope compensation, programmable switching frequency, internal soft-start, and variable frequency operation (VFO) for high light-load efficiency. The SRD output automatically controls external synchronous rectifiers. UVLO thresholds: 38.1V turn-on, 32V turn-off. Inrush current: 140mA typical. Operating current limit: 850mA minimum. Operating temperature: -40C to 85C. Tape and reel, 2000\/reel. RoHS compliant, EAR99.<\/p>","protected":false},"excerpt":{"rendered":"
The TPS23751PWPR from Texas Instruments is an integrated IEEE 802.3at PoE Powered Device (PD) interface and current-mode flyback DC-DC controller in a 16-pin HTSSOP package with PowerPAD. The device supports both 802.3at Type 2 (25.5W) and 802.3af Type 1 (13W) PoE standards, featuring an internal 0.5-ohm 100V hotswap MOSFET that eliminates the need for an […]<\/p>\n","protected":false},"author":2,"featured_media":2790,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,29],"tags":[],"chip_brand":[138],"class_list":["post-1889","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-integrated-circuits-ics","category-power-management-ics-pmic","chip_brand-ti"],"acf":{"brief_explanation":"IEEE 802.3at PoE PD interface with flyback DC-DC controller, 25.5W, 0.5-ohm hotswap MOSFET, 16-HTSSOP, -40~85C","date_code":"","package_case":"16-HTSSOP (PWP) (5.0 x 4.4 mm) with PowerPAD","in_stock":1976,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/tps23751.pdf","price":"$0.55 (100+ pcs)","product_introduction":"The TPS23751PWPR is an integrated Power-over-Ethernet (PoE) powered device (PD) interface and current-mode flyback DC-DC controller from Texas Instruments, housed in a 16-pin HTSSOP package with PowerPAD for thermal dissipation. The device supports both IEEE 802.3at (PoE+) Type 2 and IEEE 802.3af (PoE) Type 1 standards, capable of powering PDs up to 25.5W.\n\nThe PoE interface section implements type-2 hardware classification per IEEE 802.3at, with a detection signature resistor (24.9 kohm on DEN pin), programmable classification current (CLS pin resistor), and auxiliary power detect (APD) input for adapter ORing. The integrated 0.5-ohm, 100V hotswap MOSFET minimizes power dissipation and eliminates the need for an external pass transistor. The inrush current is typically limited to 140 mA, and the operating current limit is a minimum of 850 mA.\n\nThe DC-DC controller section features current-mode control with slope compensation, internal soft-start, a bootstrap startup current source, and programmable switching frequency via the RT pin resistor. The controller drives an external N-channel MOSFET through the GATE pin and supports both PWM mode for heavy loads and variable frequency operation (VFO) for improved light-load efficiency. The synchronous rectifier disable (SRD) output automatically disables external synchronous rectifiers during VFO mode to prevent reverse current flow.\n\nKey protection features include thermal shutdown, undervoltage lockout (UVLO) with 38.1V turn-on and 32V turn-off thresholds, VCC overvoltage protection, and output overvoltage protection. The T2P (Type 2 PSE) active-low output indicates when a type-2 PSE is connected or when the APD is active. The PWP package is a 16-pin HTSSOP with an exposed thermal pad (PowerPAD) that must be connected to VSS. The PWPR suffix denotes tape and reel packaging with 2,000 units per reel.","working_principle":"The TPS23751PWPR integrates two major functional blocks: a PoE PD interface and a flyback DC-DC controller, operating together to convert PoE power from an Ethernet cable into a regulated isolated DC output.\n\nPoE PD Interface: When connected to a Power Sourcing Equipment (PSE) through the Ethernet cable, the PD interface first presents a detection signature (24.9 kohm between VDD and VSS) to identify itself as a valid PoE device. After detection, the PSE applies classification voltage, and the CLS pin resistor programs the classification current to signal the PD power class (Class 0-4 for 802.3af, or Class 4 for 802.3at Type 2 at 25.5W). Once classification is complete, the PSE applies full power (44-57V). The internal 0.5-ohm, 100V hotswap MOSFET between RTN and VSS is initially off, with inrush current limited to 140 mA while the bulk capacitor on VDD charges. After the inrush period, the MOSFET turns on fully, allowing operating current up to the current limit threshold (minimum 850 mA). The DEN pin can be pulled to VSS to disable the pass MOSFET, and the APD pin allows an auxiliary power source to take priority over PoE.\n\nDC-DC Controller: The current-mode flyback controller operates from the PoE input voltage (typically 44-57V). The switching frequency is set by a resistor on the RT pin (referenced to ARTN). The controller uses peak current-mode control: the CS pin senses the primary-side MOSFET current through an external sense resistor, and the PWM comparator terminates the GATE on-time when the sensed current reaches the threshold set by the CTL voltage. The VB pin provides a 5V bias supply. The VC pin is the converter bias voltage bypassed with a minimum 0.47 uF capacitor to ARTN. The SRT pin sets the threshold for PWM-to-VFO transition, allowing the controller to enter variable frequency operation at light loads for higher efficiency.\n\nSynchronous Rectification Control: The SRD output disables external synchronous rectifier MOSFETs during VFO mode to prevent reverse current flow. This enables seamless transition between continuous conduction mode (with sync rectification) and VFO mode (with diode rectification for light-load efficiency).\n\nAdapter ORing: The APD input monitors an auxiliary power source. When APD is raised 1.5V above ARTN, the PoE pass MOSFET is disabled and T2P is forced active, enabling seamless switchover from PoE to adapter power without output interruption.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | VDD<\/td> | Input<\/td> | Positive PoE input power rail; connect to PoE input after rectifier diode bridge; bypass with 0.1 uF to VSS<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 2<\/td> | DEN<\/td> | I\/O<\/td> | Detection enable; connect 24.9 kohm to VDD for PoE detection signature; pull to VSS to disable the pass MOSFET<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 3<\/td> | CLS<\/td> | I\/O<\/td> | Classification programming; connect resistor from CLS to VSS to set IEEE 802.3at classification current<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 4<\/td> | APD<\/td> | Input<\/td> | Auxiliary Power Detect; raise 1.5V above ARTN to disable PoE pass MOSFET and force T2P active for adapter ORing<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 5<\/td> | RT<\/td> | Input<\/td> | Switching frequency programming; connect resistor from RT to ARTN to set flyback switching frequency<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 6<\/td> | T2P<\/td> | Output<\/td> | Type 2 PSE indicator; active low indicates type-2 PSE connected or APD active<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 7<\/td> | SRD<\/td> | Output<\/td> | Synchronous Rectifier Disable; disables external synchronous rectifiers during VFO mode<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 8<\/td> | CTL<\/td> | Input<\/td> | Control loop input to PWM comparator; connects to optocoupler output or feedback network<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 9<\/td> | SRT<\/td> | Input<\/td> | Sets the threshold for PWM-to-VFO transition<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 10<\/td> | VB<\/td> | Output<\/td> | 5V bias supply output; bypass with minimum 0.1 uF to ARTN<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 11<\/td> | CS<\/td> | I\/O<\/td> | Current sense input; connect to ARTN-referenced current sense resistor in MOSFET source<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 12<\/td> | VC<\/td> | I\/O<\/td> | DC-DC converter bias voltage; bypass with minimum 0.47 uF to ARTN directly at pin<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 13<\/td> | GATE<\/td> | Output<\/td> | Gate driver output for external N-channel switching MOSFET<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 14<\/td> | ARTN<\/td> | Power<\/td> | DC-DC converter analog return; connect to RTN; reference for CS, RT, VB, VC, SRT, CTL<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 15<\/td> | RTN<\/td> | Power<\/td> | Drain of internal 0.5-ohm PoE pass MOSFET; connects to negative rail of PoE input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 16<\/td> | VSS<\/td> | Power<\/td> | Negative power rail from PoE source; system ground; PowerPAD must connect to VSS<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| Pad<\/td> | PowerPAD<\/td> | Power<\/td> | Exposed thermal pad; must connect to VSS for thermal dissipation<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
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