{"id":7988,"date":"2026-06-28T06:32:19","date_gmt":"2026-06-28T06:32:19","guid":{"rendered":"https:\/\/materialparts.com\/sn74ls93n\/"},"modified":"2026-06-28T11:44:35","modified_gmt":"2026-06-28T11:44:35","slug":"sn74ls93n","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/sn74ls93n\/","title":{"rendered":"SN74LS93N"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

The SN74LS93N from Texas Instruments is a 4-bit binary ripple counter consisting of a divide-by-2 section and a divide-by-8 section \u2014 when externally connected, it counts 0-15 in a 14-pin PDIP package.<\/p>\n

\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n\n
\u0627\u0644\u0648\u0638\u064a\u0641\u0629<\/td>\n4-bit binary ripple counter<\/td>\n<\/tr>\n
\u0639\u0627\u0626\u0644\u0629 \u0627\u0644\u0645\u0646\u0637\u0642<\/td>\nLS (Low-power Schottky)<\/td>\n<\/tr>\n
\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n4.75V to 5.25V<\/td>\n<\/tr>\n
Counter Sections<\/td>\nDivide-by-2 (CP0\/Q0) + Divide-by-8 (CP1\/Q1,Q2,Q3)<\/td>\n<\/tr>\n
Max Count<\/td>\n15 (4-bit binary, 0-15)<\/td>\n<\/tr>\n
Trigger<\/td>\nNegative edge (HIGH-to-LOW transition)<\/td>\n<\/tr>\n
\u0625\u0639\u0627\u062f\u0629 \u062a\u0639\u064a\u064a\u0646<\/td>\nAsynchronous, gated AND (MR1\u00b7MR2, active HIGH)<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u062f \u0627\u0644\u0623\u0642\u0635\u0649 \u0644\u062a\u0631\u062f\u062f \u0627\u0644\u0633\u0627\u0639\u0629<\/td>\n25MHz typical<\/td>\n<\/tr>\n
\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n70ns max @ 5V<\/td>\n<\/tr>\n
\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n0\u00b0C to +70\u00b0C<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nPDIP-14 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n

\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n
    \n
  • Two independent counter sections: \u00f72 and \u00f78<\/li>\n
  • External connection Q0\u2192CP1 creates \u00f716 counter<\/li>\n
  • Gated AND master reset (MR1 AND MR2 both HIGH = reset)<\/li>\n
  • Negative-edge triggered<\/li>\n
  • Typical power dissipation: 45mW<\/li>\n<\/ul>\n

    \u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
      \n
    • 4-bit binary counting (0-15)<\/li>\n
    • Frequency division by 2, 4, 8, 16<\/li>\n
    • Time-delay circuits<\/li>\n
    • Event counting<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The SN74LS93N from Texas Instruments is a 4-bit binary ripple counter consisting of a divide-by-2 section and a divide-by-8 section \u2014 when externally connected, it counts 0-15 in a 14-pin PDIP package. Key Specifications Function 4-bit binary ripple counter Logic Family LS (Low-power Schottky) Supply Voltage 4.75V to 5.25V Counter Sections Divide-by-2 (CP0\/Q0) […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-7988","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"4-bit binary ripple counter, \u00f72+\u00f78 sections, LS TTL, PDIP-14","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":3000,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74ls90-92-93.pdf","price":"$2.064 @ 1ku","product_introduction":"The SN74LS93N from Texas Instruments is a 4-bit binary ripple counter consisting of two independent sections: a divide-by-2 section (clocked by CP0, output Q0) and a divide-by-8 section (clocked by CP1, outputs Q1, Q2, Q3). The two sections are NOT internally connected \u2014 the designer must externally wire Q0 to CP1 to create a full 4-bit binary counter counting 0-15 with divide-by-2, 4, 8, and 16 outputs. This separation allows flexible configurations: using only the \u00f72 section, only the \u00f73\/\u00f78 section, or both together. The negative-edge triggering (counting on the HIGH-to-LOW clock transition) is standard for the 74LS90\/92\/93 family. The gated AND master reset requires BOTH MR1 AND MR2 to be HIGH simultaneously to reset the counter; if either is LOW, counting continues. This allows one MR input to be used as an enable while the other provides the reset function. The 74LS93 is part of the 74LS90\/92\/93 family: LS90 is a decade (0-9) counter, LS92 is a divide-by-12 counter, and LS93 is a 4-bit binary (0-15) counter. The N suffix denotes the PDIP-14 through-hole package.","working_principle":"The SN74LS93N contains four JK flip-flops configured as two independent counter sections. Section 1: A single flip-flop with clock input CP0 and output Q0. It toggles on the HIGH-to-LOW transition of CP0, dividing the input frequency by 2. Section 2: Three flip-flops cascaded as a 3-bit ripple counter with clock input CP1 and outputs Q1, Q2, Q3. CP1 drives the first flip-flop (Q1), Q1 drives the second (Q2), and Q2 drives the third (Q3). The count sequence on Q3,Q2,Q1 is: 000\u2192001\u2192010\u2192011\u2192100\u2192101\u2192110\u2192111\u2192000 (divide by 8). For 4-bit binary counting: connect Q0 to CP1 externally. Input pulses on CP0; Q0 toggles at half the input rate; Q0's HIGH-to-LOW transitions clock the \u00f78 section. The full count on Q3,Q2,Q1,Q0 is 0000\u21920001\u2192...\u21921111\u21920000 (0-15). Reset: when MR1 AND MR2 are both HIGH, all four flip-flops are cleared (Q0-Q3 = LOW). If either MR is LOW, the counter operates normally. The counter is negative-edge triggered throughout.","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Description<\/th><\/tr>\n
      1<\/td>CP1<\/td>Input<\/td>Clock input for \u00f78 section (negative edge)<\/td><\/tr>\n
      2<\/td>MR1<\/td>Input<\/td>Master reset 1 (active HIGH, AND-gated with MR2)<\/td><\/tr>\n
      3<\/td>MR2<\/td>Input<\/td>Master reset 2 (active HIGH, AND-gated with MR1)<\/td><\/tr>\n
      4<\/td>NC<\/td>\u2014<\/td>No connection<\/td><\/tr>\n
      5<\/td>VCC<\/td>Power<\/td>Supply (5V)<\/td><\/tr>\n
      6<\/td>MR1*<\/td>Input<\/td>Master reset 1 (duplicate, connect together)<\/td><\/tr>\n
      7<\/td>MR2*<\/td>Input<\/td>Master reset 2 (duplicate, connect together)<\/td><\/tr>\n
      8<\/td>Q2<\/td>Output<\/td>Counter output bit 2<\/td><\/tr>\n
      9<\/td>Q1<\/td>Output<\/td>Counter output bit 1<\/td><\/tr>\n
      10<\/td>Q3<\/td>Output<\/td>Counter output bit 3 (MSB)<\/td><\/tr>\n
      11<\/td>Q0<\/td>Output<\/td>Counter output bit 0 (LSB, \u00f72 section)<\/td><\/tr>\n
      12<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>\n
      13<\/td>NC<\/td>\u2014<\/td>No connection<\/td><\/tr>\n
      14<\/td>CP0<\/td>Input<\/td>Clock input for \u00f72 section (negative edge)<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • 4-Bit Binary Counter (0-15):<\/strong> Q0 \u2192 CP1 (external wire); input pulses \u2192 CP0; MR1 and MR2 tied together; Q0-Q3 count 0-15; divide by 2,4,8,16<\/li>\n
      • Independent \u00f72 and \u00f78:<\/strong> Two separate clocks: CP0 drives Q0 (\u00f72); CP1 drives Q1-Q3 (\u00f78); no external connection needed<\/li>\n
      • Frequency Divider:<\/strong> CP0 input; Q0=\u00f72, Q1=\u00f74, Q2=\u00f78, Q3=\u00f716 (with Q0\u2192CP1 connected)<\/li>\n
      • Controlled Reset:<\/strong> MR1 tied HIGH; MR2 = enable signal; counter runs when MR2=LOW, resets when MR2=HIGH; one MR as gate, other as reset<\/li>\n<\/ul>","alternative_models":"\n
        Model<\/th>Manufacturer<\/th>Key Difference<\/th>Package<\/th>Supply<\/th><\/tr>\n
        74LS93N<\/td>TI\/Nexperia<\/td>Original TTL version with 5V-only supply, typical propagation delay 10-15ns<\/td>DIP-14<\/td>5V TTL<\/td><\/tr>\n
        74LS93D<\/td>TI\/Nexperia<\/td>Surface-mount SOIC version of LS with identical logic function<\/td>SOIC-14<\/td>5V TTL<\/td><\/tr>\n
        74HC93D<\/td>TI\/Nexperia<\/td>CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity<\/td>SOIC-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74HC93N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HC family for prototyping and repair<\/td>DIP-14<\/td>2-6V CMOS<\/td><\/tr>\n
        74HCT93D<\/td>TI\/Nexperia<\/td>CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V<\/td>SOIC-14<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n
        74HCT93N<\/td>TI\/Nexperia<\/td>Through-hole DIP version of HCT family for prototyping and repair<\/td>DIP-14<\/td>4.5-5.5V TTL-in<\/td><\/tr>\n<\/table>\n

        The 7493 is a 4-Bit Binary Ripple Counter. Family variants span from the original LS TTL (5V only) to modern LVC\/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7988","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=7988"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7988\/revisions"}],"predecessor-version":[{"id":8149,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7988\/revisions\/8149"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=7988"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=7988"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=7988"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=7988"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}