{"id":7977,"date":"2026-06-28T06:25:34","date_gmt":"2026-06-28T06:25:34","guid":{"rendered":"https:\/\/materialparts.com\/cd4071be\/"},"modified":"2026-06-28T11:44:51","modified_gmt":"2026-06-28T11:44:51","slug":"cd4071be","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/cd4071be\/","title":{"rendered":"CD4071BE"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The CD4071BE from Texas Instruments contains four independent 2-input OR gates in a 14-pin PDIP package, providing direct implementation of the positive-logic OR function across the wide 3V-18V CMOS supply range.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>Number of Gates<\/td>\n<td>4 (quad 2-input OR)<\/td>\n<\/tr>\n<tr>\n<td>Technology<\/td>\n<td>CD4000B CMOS<\/td>\n<\/tr>\n<tr>\n<td>\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n<td>3V to 18V<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n<td>60ns typical @ VDD=10V; 125ns @ 5V<\/td>\n<\/tr>\n<tr>\n<td>Transition Time<\/td>\n<td>100ns typical @ VDD=5V<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u064a\u0627\u0631 \u0627\u0644\u062a\u0647\u062f\u0626\u0629<\/td>\n<td>0.01\u00b5A typical @ 25\u00b0C<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u064a\u0627\u0631 \u0627\u0644\u0625\u062e\u0631\u0627\u062c<\/td>\n<td>1.5mA sink \/ 1.5mA source @ VDD=10V<\/td>\n<\/tr>\n<tr>\n<td>Input Capacitance<\/td>\n<td>5pF typical<\/td>\n<\/tr>\n<tr>\n<td>Noise Margin<\/td>\n<td>1V @ VDD=5V; 2V @ VDD=10V<\/td>\n<\/tr>\n<tr>\n<td>\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n<td>-55 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +125 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>PDIP-14 (19.3 x 6.35mm)<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>Quad 2-input OR gates<\/li>\n<li>Wide supply voltage: 3V to 18V<\/li>\n<li>Near-zero quiescent current<\/li>\n<li>High noise immunity<\/li>\n<li>Standardized symmetrical output characteristics<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>Signal combining (any-HIGH detection)<\/li>\n<li>Control logic<\/li>\n<li>Address decoding<\/li>\n<li>Alarm systems<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The CD4071BE from Texas Instruments contains four independent 2-input OR gates in a 14-pin PDIP package, providing direct implementation of the positive-logic OR function across the wide 3V-18V CMOS supply range. Key Specifications Number of Gates 4 (quad 2-input OR) Technology CD4000B CMOS Supply Voltage 3V to 18V Propagation Delay 60ns typical @ [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[138],"class_list":["post-7977","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-ti"],"acf":{"brief_explanation":"Quad 2-input OR gate, CMOS 3-18V, 60ns, PDIP-14","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)","in_stock":690,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cd4071b-mil.pdf","price":"$0.35 @ 1ku","product_introduction":"The CD4071BE from Texas Instruments contains four independent 2-input OR gates. Each gate implements Y = A OR B; the output is HIGH when either or both inputs are HIGH, and LOW only when both inputs are LOW. The CD4071 provides the positive-logic OR function directly \u2014 unlike NAND or NOR implementations that require DeMorgan conversion. The 3V-18V supply range makes it compatible with 5V TTL systems, 3.3V logic, 9V battery circuits, and 12V automotive systems. The near-zero quiescent current (0.01\u00b5A) means the IC draws virtually no power when the inputs are stable, making it ideal for battery-powered applications. The BE suffix denotes the PDIP-14 package with full military temperature range (-55\u00b0C to +125\u00b0C).","working_principle":"Each OR gate in the CD4071BE performs Y = A + B (positive logic). The output is HIGH if input A is HIGH, or input B is HIGH, or both are HIGH. The output is LOW only when both inputs are LOW. Truth table: (0,0)\u21920; (0,1)\u21921; (1,0)\u21921; (1,1)\u21921. The OR function is fundamental in digital logic: it detects when ANY of multiple conditions is active. For active-HIGH alarm systems, multiple fault signals are ORed together \u2014 if any fault occurs, the alarm activates. In address decoding, the OR combines multiple enable signals. The CMOS implementation uses complementary PMOS\/NMOS transistor pairs: the PMOS network connects the output to VDD when either input is HIGH, and the NMOS network connects the output to VSS when both inputs are LOW. This push-pull output provides symmetrical drive capability (1.5mA source and sink at VDD=10V). The 60ns propagation delay at VDD=10V is adequate for medium-speed applications up to several MHz.","pin_description":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Description<\/th><\/tr>\n<tr><td>1<\/td><td>1A<\/td><td>Input<\/td><td>Gate 1 input A<\/td><\/tr>\n<tr><td>2<\/td><td>1B<\/td><td>Input<\/td><td>Gate 1 input B<\/td><\/tr>\n<tr><td>3<\/td><td>1Y<\/td><td>Output<\/td><td>Gate 1 output (A OR B)<\/td><\/tr>\n<tr><td>4<\/td><td>2Y<\/td><td>Output<\/td><td>Gate 2 output (A OR B)<\/td><\/tr>\n<tr><td>5<\/td><td>2A<\/td><td>Input<\/td><td>Gate 2 input A<\/td><\/tr>\n<tr><td>6<\/td><td>2B<\/td><td>Input<\/td><td>Gate 2 input B<\/td><\/tr>\n<tr><td>7<\/td><td>VSS<\/td><td>Power<\/td><td>Ground<\/td><\/tr>\n<tr><td>8<\/td><td>3A<\/td><td>Input<\/td><td>Gate 3 input A<\/td><\/tr>\n<tr><td>9<\/td><td>3B<\/td><td>Input<\/td><td>Gate 3 input B<\/td><\/tr>\n<tr><td>10<\/td><td>3Y<\/td><td>Output<\/td><td>Gate 3 output (A OR B)<\/td><\/tr>\n<tr><td>11<\/td><td>4Y<\/td><td>Output<\/td><td>Gate 4 output (A OR B)<\/td><\/tr>\n<tr><td>12<\/td><td>4A<\/td><td>Input<\/td><td>Gate 4 input A<\/td><\/tr>\n<tr><td>13<\/td><td>4B<\/td><td>Input<\/td><td>Gate 4 input B<\/td><\/tr>\n<tr><td>14<\/td><td>VDD<\/td><td>Power<\/td><td>Supply (3V to 18V)<\/td><\/tr>\n<\/table>","application_scenarios":"<ul>\n<li><strong>Signal Combine:<\/strong> Two interrupt sources \u2192 OR gate \u2192 single interrupt line to MCU; either source triggers interrupt<\/li>\n<li><strong>Alarm System:<\/strong> Overtemp, overvoltage, overcurrent signals \u2192 three OR gates cascaded \u2192 single alarm output<\/li>\n<li><strong>Enable Logic:<\/strong> Manual enable OR auto-enable \u2192 OR gate \u2192 device enable; device ON if either source is active<\/li>\n<li><strong>Multi-Voltage:<\/strong> Operate at 12V with 5V logic inputs; CMOS thresholds (~6V at VDD=12V) require level shifting of 5V signals<\/li>\n<\/ul>","alternative_models":"<table border=\"1\" cellpadding=\"4\">\n<tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><th>Package<\/th><th>Supply<\/th><\/tr>\n<tr><td>CD4071BM<\/td><td>TI<\/td><td>SOIC-14 surface-mount version with identical logic function and 3-18V range<\/td><td>SOIC-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>CD4071BE<\/td><td>TI<\/td><td>Through-hole DIP version for prototyping and legacy board repair<\/td><td>DIP-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>HEF4071BT<\/td><td>NXP<\/td><td>Pin-compatible CMOS version with improved ESD protection and 3-15V supply<\/td><td>SOIC-14<\/td><td>3-15V<\/td><\/tr>\n<tr><td>MC144071BDR2G<\/td><td>onsemi<\/td><td>Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option<\/td><td>SOIC-14<\/td><td>3-18V<\/td><\/tr>\n<tr><td>74HC32D<\/td><td>TI\/Nexperia<\/td><td>HC CMOS version with higher speed and 2-6V supply for modern logic systems<\/td><td>SOIC-14<\/td><td>2-6V<\/td><\/tr>\n<tr><td>74HC32N<\/td><td>TI\/Nexperia<\/td><td>HC CMOS through-hole version for prototyping with 2-6V supply range<\/td><td>DIP-14<\/td><td>2-6V<\/td><\/tr>\n<tr><td>74HCT32D<\/td><td>Nexperia<\/td><td>HCT version with TTL-compatible inputs for mixed 5V TTL\/CMOS systems<\/td><td>SOIC-14<\/td><td>4.5-5.5V<\/td><\/tr>\n<\/table>\n<p>CD4071 is the CMOS 4000-series quad 2-input or gate operating over the wide 3-18V supply range. The HEF4071 (NXP) and MC144071 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC32 HC\/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM\/M suffix (SOIC); through-hole versions use the BE suffix (DIP).<\/p>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7977","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=7977"}],"version-history":[{"count":1,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7977\/revisions"}],"predecessor-version":[{"id":8158,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7977\/revisions\/8158"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=7977"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=7977"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=7977"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=7977"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}