{"id":7395,"date":"2026-06-24T04:53:26","date_gmt":"2026-06-24T04:53:26","guid":{"rendered":"https:\/\/materialparts.com\/pcal6524hea\/"},"modified":"2026-06-24T04:53:26","modified_gmt":"2026-06-24T04:53:26","slug":"pcal6524hea","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/pcal6524hea\/","title":{"rendered":"PCAL6524HEA"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The PCAL6524HEA from NXP is a 24-bit I2C\/SMBus I\/O expander with 24 quasi-bidirectional I\/O pins, programmable output drive strength, interrupt output, and reset in an HVQFN-28 package. Operating from 1.65V to 5.5V.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>I\/O Pins<\/td>\n<td>24 (quasi-bidirectional)<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u0648\u0627\u062c\u0647\u0629<\/td>\n<td>I2C\/SMBus (up to 1MHz)<\/td>\n<\/tr>\n<tr>\n<td>I2C Addresses<\/td>\n<td>4 selectable (A0-A1 pins)<\/td>\n<\/tr>\n<tr>\n<td>\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n<td>1.65 \u0641\u0648\u0644\u062a \u0625\u0644\u0649 5.5 \u0641\u0648\u0644\u062a<\/td>\n<\/tr>\n<tr>\n<td>Output Drive<\/td>\n<td>Programmable (2-bit, 4 levels)<\/td>\n<\/tr>\n<tr>\n<td>Input Trigger<\/td>\n<td>Edge or level, per-pin mask<\/td>\n<\/tr>\n<tr>\n<td>Interrupt Output<\/td>\n<td>Active-low, open-drain<\/td>\n<\/tr>\n<tr>\n<td>\u0625\u0639\u0627\u062f\u0629 \u062a\u0639\u064a\u064a\u0646<\/td>\n<td>Active-low hardware reset<\/td>\n<\/tr>\n<tr>\n<td>\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n<td>-40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>HVQFN-28 (4.5&#215;4.5mm)<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>24-bit I2C I\/O expander with programmable output drive strength per pin<\/li>\n<li>Flexible interrupt logic with per-pin mask and edge\/level triggering<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>I\/O expansion for processors with limited GPIO in industrial systems<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The PCAL6524HEA from NXP is a 24-bit I2C\/SMBus I\/O expander with 24 quasi-bidirectional I\/O pins, programmable output drive strength, interrupt output, and reset in an HVQFN-28 package. Operating from 1.65V to 5.5V. Key Specifications I\/O Pins 24 (quasi-bidirectional) Interface I2C\/SMBus (up to 1MHz) I2C Addresses 4 selectable (A0-A1 pins) Supply Voltage 1.65 V [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[168],"class_list":["post-7395","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-nxp"],"acf":{"brief_explanation":"24-bit I2C I\/O expander, 1.65-5.5V, prog drive, interrupt, HVQFN-28","date_code":"","package_case":"HVQFN-28 (4.50 x 4.50 x 0.85 mm)","in_stock":6100,"datasheet":"https:\/\/www.nxp.com\/docs\/en\/data-sheet\/PCAL6524.pdf","price":"$1.20 @ 1ku","product_introduction":"The PCAL6524HEA from NXP is a 24-bit I2C-bus and SMBus compatible I\/O expander that provides 24 quasi-bidirectional I\/O pins for expanding GPIO capability of processors and controllers. The device features programmable output drive strength (4 levels per pin pair), allowing optimization for different load conditions. The enhanced interrupt logic supports per-pin interrupt masking and configurable edge or level triggering, reducing the interrupt service burden on the host processor. The device operates from 1.65V to 5.5V, supporting mixed-voltage system integration. The I2C address is set by two hardware pins (A0, A1), allowing up to 4 devices on the same I2C bus for a total of 96 additional I\/O pins. An active-low RESET input provides a hardware reset that initializes all registers to default. The HVQFN-28 package provides a compact footprint with exposed pad for thermal and electrical ground.","working_principle":"The PCAL6524HEA operates as an I2C-bus slave device providing 24 GPIO pins. (1) I2C Interface: The device responds to I2C slave addresses set by A0\/A1 pins. The host processor reads and writes internal registers via I2C to configure and control the I\/O pins. The I2C interface supports standard mode (100kHz), fast mode (400kHz), and fast-mode plus (1MHz). (2) Quasi-Bidirectional I\/O: Each I\/O pin can function as an input or output without a direction control register. As an output, the pin drives high through a weak pull-up or low through a strong pull-down. As an input, the pin is high-impedance (driven high by the weak pull-up, overridden by an external signal). (3) Programmable Drive: The output drive strength can be set to one of four levels per pin pair, allowing optimization for capacitive loads, bus contention, or power consumption. (4) Interrupt: When any input pin changes state, the INT output is asserted (active-low). Individual pins can be masked from generating interrupts. The interrupt can be cleared by reading the input port register or by writing to the interrupt mask register.","pin_description":"<table><tr><th>Pin Group<\/th><th>Count<\/th><th>Function<\/th><\/tr><tr><td>VDD\/VSS<\/td><td>4<\/td><td>Power (1.65-5.5V) and ground<\/td><\/tr><tr><td>I\/O<\/td><td>24<\/td><td>GPIO0-GPIO23<\/td><\/tr><tr><td>SDA\/SCL<\/td><td>2<\/td><td>I2C data and clock<\/td><\/tr><tr><td>A0\/A1<\/td><td>2<\/td><td>I2C address select<\/td><\/tr><tr><td>INT<\/td><td>1<\/td><td>Interrupt output (active-low)<\/td><\/tr><tr><td>RESET<\/td><td>1<\/td><td>Hardware reset (active-low)<\/td><\/tr><\/table>","application_scenarios":"<ul><li>I\/O expansion for processors with limited GPIO in industrial control<\/li><\/ul>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>NXP<\/td><td>PCA9673D<\/td><td>SO-24<\/td><td>16-bit, similar family<\/td><\/tr><tr><td>TI<\/td><td>TCA6424ARGJR<\/td><td>QFN-28<\/td><td>24-bit, similar<\/td><\/tr><tr><td>Microchip<\/td><td>MCP23017-E\/SO<\/td><td>SOIC-28<\/td><td>16-bit, popular<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7395","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=7395"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7395\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=7395"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=7395"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=7395"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=7395"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}