{"id":7318,"date":"2026-06-24T03:37:56","date_gmt":"2026-06-24T03:37:56","guid":{"rendered":"https:\/\/materialparts.com\/74hc138d653\/"},"modified":"2026-06-24T03:37:56","modified_gmt":"2026-06-24T03:37:56","slug":"74hc138d653","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/74hc138d653\/","title":{"rendered":"74HC138D653"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The 74HC138D653 from Nexperia is a high-speed Si-gate CMOS 3-to-8 line decoder\/demultiplexer with active-low outputs in an SOIC-16 package. Featuring 2 enable inputs (E1, E2 active-low, E3 active-high) and 18ns typical propagation delay at 4.5V.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>\u0627\u0644\u0648\u0638\u064a\u0641\u0629<\/td>\n<td>3-to-8 line decoder\/demultiplexer<\/td>\n<\/tr>\n<tr>\n<td>Inputs<\/td>\n<td>3 address (A0-A2), 3 enable<\/td>\n<\/tr>\n<tr>\n<td>Outputs<\/td>\n<td>8 (active low, Y0-Y7)<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n<td>18 ns typical @ 4.5V<\/td>\n<\/tr>\n<tr>\n<td>\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n<td>2.0 V to 6.0 V<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u064a\u0627\u0631 \u0627\u0644\u0625\u062e\u0631\u0627\u062c<\/td>\n<td>+\/-5.2 mA @ 4.5V<\/td>\n<\/tr>\n<tr>\n<td>\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n<td>-40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +125 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>SOIC-16 (3.9 x 9.9 mm)<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>3-to-8 decoder with 3 enable inputs for flexible cascading and demultiplexing<\/li>\n<li>Active-low decoded outputs for direct chip-select signal generation<\/li>\n<li>2.0V to 6.0V wide supply range with 18ns propagation at 4.5V<\/li>\n<li>Multiple enable inputs allow cascading for 4-to-16 or 5-to-32 decoding<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>Memory address decoding and peripheral chip select generation<\/li>\n<li>Clock distribution and demultiplexer functions<\/li>\n<li>Logic system expansion with cascaded 3-to-8 decoder stages<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The 74HC138D653 from Nexperia is a high-speed Si-gate CMOS 3-to-8 line decoder\/demultiplexer with active-low outputs in an SOIC-16 package. Featuring 2 enable inputs (E1, E2 active-low, E3 active-high) and 18ns typical propagation delay at 4.5V. Key Specifications Function 3-to-8 line decoder\/demultiplexer Inputs 3 address (A0-A2), 3 enable Outputs 8 (active low, Y0-Y7) Propagation [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[],"tags":[],"chip_brand":[140],"class_list":["post-7318","post","type-post","status-publish","format-standard","hentry","chip_brand-nexperia"],"acf":{"brief_explanation":"3-to-8 decoder\/demux, active-low outputs, 3 enable, 18ns, 2-6V, SOIC-16","date_code":"","package_case":"SOIC-16 (9.90 x 3.90 x 1.25 mm)","in_stock":14500,"datasheet":"https:\/\/www.nexperia.com\/product\/download\/74HC138.html","price":"$0.28 @ 1ku","product_introduction":"The 74HC138D653 from Nexperia is a high-speed 3-to-8 line decoder\/demultiplexer with three binary weighted address inputs (A0 to A2) and eight mutually exclusive active-low outputs (Y0 to Y7). The device features three enable inputs: two active-low (E1, E2) and one active-high (E3), allowing flexible cascading for larger decoding functions. When any enable input is inactive, all outputs are forced high. When enabled, the output corresponding to the binary address is driven low while all other outputs remain high. The 74HC138 is commonly used for memory address decoding, chip select generation, and demultiplexer applications. The -D653 suffix denotes the SOIC-16 package with tape and reel packaging. The device operates from 2.0V to 6.0V over the -40C to +125C temperature range.","working_principle":"The 74HC138D653 is a combinational logic decoder. (1) Decoding: The three address inputs (A0, A1, A2) select one of eight output lines. The selected output (Yn) is driven low, while all other outputs remain high. For example, A2A1A0 = 010 selects Y2 low. (2) Enable Logic: The enable function is E = E3 AND NOT(E1) AND NOT(E2). Only when E3 is high AND both E1 and E2 are low are the outputs enabled. Otherwise, all outputs are forced to their inactive high state. (3) Demultiplexer: When used as a demultiplexer, the data input is connected to E3 (or E1\/E2 inverted), and the address selects which output the data appears on. (4) Cascading: Two 74HC138 devices can implement a 4-to-16 decoder by connecting A3 to the enable inputs of the two devices in complementary fashion.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Function<\/th><\/tr><tr><td>1<\/td><td>A0<\/td><td>Address input 0 (LSB)<\/td><\/tr><tr><td>2<\/td><td>A1<\/td><td>Address input 1<\/td><\/tr><tr><td>3<\/td><td>A2<\/td><td>Address input 2 (MSB)<\/td><\/tr><tr><td>4,5<\/td><td>E1, E2<\/td><td>Enable inputs (active low)<\/td><\/tr><tr><td>6<\/td><td>E3<\/td><td>Enable input (active high)<\/td><\/tr><tr><td>7<\/td><td>Y7<\/td><td>Decoded output 7 (active low)<\/td><\/tr><tr><td>8<\/td><td>GND<\/td><td>Ground<\/td><\/tr><tr><td>9<\/td><td>Y6<\/td><td>Decoded output 6<\/td><\/tr><tr><td>10<\/td><td>Y5<\/td><td>Decoded output 5<\/td><\/tr><tr><td>11<\/td><td>Y4<\/td><td>Decoded output 4<\/td><\/tr><tr><td>12<\/td><td>Y3<\/td><td>Decoded output 3<\/td><\/tr><tr><td>13<\/td><td>Y2<\/td><td>Decoded output 2<\/td><\/tr><tr><td>14<\/td><td>Y1<\/td><td>Decoded output 1<\/td><\/tr><tr><td>15<\/td><td>Y0<\/td><td>Decoded output 0<\/td><\/tr><tr><td>16<\/td><td>VCC<\/td><td>Supply voltage (2-6V)<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Memory address decoding with 8 active-low chip selects from 3 address lines<\/li><li>Demultiplexer for data distribution to 8 output channels<\/li><li>4-to-16 or 5-to-32 decoder expansion via cascaded enable inputs<\/li><\/ul>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>TI<\/td><td>SN74HC138DR<\/td><td>SOIC-16<\/td><td>Pin-compatible, TI brand<\/td><\/tr><tr><td>onsemi<\/td><td>MC74HC138DR2G<\/td><td>SOIC-16<\/td><td>Pin-compatible, onsemi brand<\/td><\/tr><tr><td>Nexperia<\/td><td>74HC238D<\/td><td>SOIC-16<\/td><td>Active-high output version<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7318","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=7318"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/7318\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=7318"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=7318"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=7318"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=7318"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}