The UCC27524D from Texas Instruments is a dual 5A high-speed low-side gate driver with non-inverting inputs in a SOIC-8 package. With 17ns propagation delay and -5V input voltage capability, it drives MOSFETs and IGBTs in power supply and motor drive applications.<\/p>\n
| Peak Output Current<\/td>\n | 5 A (source and sink)<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| \u0627\u0644\u0642\u0646\u0648\u0627\u062a<\/td>\n | 2 (dual non-inverting)<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| \u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n | 17 ns (typical)<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Rise\/Fall Time<\/td>\n | 6 ns \/ 10 ns (typical)<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| \u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n | 4.5 V to 18 V<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Delay Matching<\/td>\n | 1 ns (typical between channels)<\/td>\n<\/tr>\n | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| \u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n | -40C to +150C<\/td>\n<\/tr>\n<\/table>\n\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\nProduct Overview The UCC27524D from Texas Instruments is a dual 5A high-speed low-side gate driver with non-inverting inputs in a SOIC-8 package. With 17ns propagation delay and -5V input voltage capability, it drives MOSFETs and IGBTs in power supply and motor drive applications. Key Specifications Peak Output Current 5 A (source and sink) Channels 2 […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[36,13],"tags":[],"chip_brand":[138],"class_list":["post-7167","post","type-post","status-publish","format-standard","hentry","category-gate-driver-ics","category-integrated-circuits-ics","chip_brand-ti"],"acf":{"brief_explanation":"Dual 5A low-side gate driver, non-inverting, 17ns, -5V input, SOIC-8, enable pins","date_code":"","package_case":"SOIC-8 (4.90 x 3.91 x 1.50 mm)","in_stock":12168,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/ucc27524.pdf","price":"$1.10 @ 1ku","product_introduction":"The UCC27524D from Texas Instruments is a dual-channel, high-speed, low-side gate driver in a SOIC-8 package. Each channel provides 5A peak source and 5A peak sink drive current for effectively driving MOSFET and IGBT power switches. The device features dual non-inverting inputs with 17ns typical propagation delay and 1ns channel-to-channel delay matching, making it ideal for synchronous rectification and dual-switch applications requiring critical timing. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between high and low thresholds provides excellent noise immunity. The UCC27524 variant adds the ability to handle -5V directly at the input pins for increased robustness in noisy environments. Independent enable pins (ENA, ENB) allow each channel to be separately controlled. The outputs are held low during VDD UVLO and when inputs are floating, ensuring glitch-free operation during power-up and power-down.","working_principle":"The UCC27524D uses a high-speed CMOS output stage with anti-shoot-through circuitry. (1) Input Stage: TTL\/CMOS compatible input thresholds (VIH = 2.0V, VIL = 0.8V) are fixed and independent of VDD. Internal pull-up and pull-down resistors ensure outputs are held low when inputs float. The -5V input handling capability uses ESD clamping structures rated for sustained negative voltage. (2) Enable: Independent ENA and ENB pins are internally pulled up to VDD, enabling both channels by default. Driving ENx low disables the corresponding output. This allows UCC27524 to be pin-compatible with older drivers (UCC27324). (3) Output Stage: A hybrid pullup structure uses a PMOS in parallel with a briefly-activated NMOS boost transistor. During the low-to-high transition, both transistors conduct briefly, providing extra peak sourcing current during the Miller plateau. The pulldown uses a single NMOS. (4) Anti-Shoot-Through: Internal timing ensures the pullup and pulldown transistors never conduct simultaneously, minimizing quiescent current.","pin_description":"
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