{"id":5455,"date":"2026-06-10T02:14:36","date_gmt":"2026-06-10T02:14:36","guid":{"rendered":"https:\/\/materialparts.com\/tps51116rger\/"},"modified":"2026-06-10T02:14:36","modified_gmt":"2026-06-10T02:14:36","slug":"tps51116rger","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/tps51116rger\/","title":{"rendered":"TPS51116RGER"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

The TPS51116RGER from Texas Instruments is a complete DDR\/DDR2\/DDR3\/DDR3L\/LPDDR3\/DDR4 memory power solution in a 24-pin VQFN package. It integrates a synchronous buck controller for VDDQ, a 3A sink\/source LDO for VTT, and a buffered low-noise reference for VTTREF, supporting all DDR sleep state controls.<\/p>\n

\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Buck Controller (VDDQ)<\/td>\nSynchronous, D-CAP or current mode<\/td>\n<\/tr>\n
VDDQ Output Range<\/td>\n0.75V to 3.0V (2.5V\/1.8V\/1.5V\/1.35V\/1.2V presets)<\/td>\n<\/tr>\n
VDDQ Input Range<\/td>\n3.0V to 28V<\/td>\n<\/tr>\n
VDDQ Max Output Current<\/td>\n10A (external MOSFETs)<\/td>\n<\/tr>\n
\u062a\u0631\u062f\u062f \u0627\u0644\u062a\u062d\u0648\u064a\u0644<\/td>\n400kHz fixed<\/td>\n<\/tr>\n
LDO (VTT)<\/td>\n3A sink\/source tracking linear regulator<\/td>\n<\/tr>\n
VTT Accuracy<\/td>\n+\/-20mV (vs VTTREF)<\/td>\n<\/tr>\n
VTTREF Output<\/td>\nBuffered, low-noise, 10mA, +\/-20mV accuracy<\/td>\n<\/tr>\n
VTT Capacitor<\/td>\nOnly 20uF ceramic required<\/td>\n<\/tr>\n
S3 Support<\/td>\nVTT high-Z (suspend to RAM)<\/td>\n<\/tr>\n
S4\/S5 Support<\/td>\nVDDQ, VTT, VTTREF soft-off (suspend to disk)<\/td>\n<\/tr>\n
VLDOIN<\/td>\nExternal supply input to reduce LDO power loss<\/td>\n<\/tr>\n
Protection<\/td>\nOvervoltage, undervoltage, thermal shutdown<\/td>\n<\/tr>\n
\u0637\u0627\u0642\u0629 \u062c\u064a\u062f\u0629<\/td>\nYes (PGOOD output)<\/td>\n<\/tr>\n
\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n-40 to +85 C<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nVQFN-24 (4.0 x 4.0 mm)<\/td>\n<\/tr>\n
Status<\/td>\n\u0646\u0634\u0637<\/td>\n<\/tr>\n<\/table>\n

\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n
    \n
  • Complete DDR memory power: VDDQ + VTT + VTTREF<\/li>\n
  • Supports DDR through DDR4 standards<\/li>\n
  • Synchronous buck with D-CAP or current mode<\/li>\n
  • 3A sink\/source VTT LDO with external VLDOIN<\/li>\n
  • Buffered VTTREF with +\/-20mV accuracy<\/li>\n
  • S3 (high-Z) and S4\/S5 (soft-off) sleep state control<\/li>\n
  • 400kHz fixed frequency, 100ns load step response<\/li>\n
  • Overvoltage, undervoltage, thermal protection<\/li>\n<\/ul>\n

    \u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
      \n
    • DDR\/DDR2\/DDR3\/DDR4 memory power supplies<\/li>\n
    • SSTL-2, SSTL-18, SSTL-15 termination<\/li>\n
    • Laptop and desktop memory modules<\/li>\n
    • Embedded computing platforms<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The TPS51116RGER from Texas Instruments is a complete DDR\/DDR2\/DDR3\/DDR3L\/LPDDR3\/DDR4 memory power solution in a 24-pin VQFN package. It integrates a synchronous buck controller for VDDQ, a 3A sink\/source LDO for VTT, and a buffered low-noise reference for VTTREF, supporting all DDR sleep state controls. Key Specifications Buck Controller (VDDQ) Synchronous, D-CAP or current […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[31,13],"tags":[],"chip_brand":[138],"class_list":["post-5455","post","type-post","status-publish","format-standard","hentry","category-dc-dc-converters","category-integrated-circuits-ics","chip_brand-ti"],"acf":{"brief_explanation":"DDR power solution, VDDQ buck + 3A VTT LDO + VTTREF, VQFN-24","date_code":"","package_case":"VQFN-24 (4.0 x 4.0 x 0.88 mm)","in_stock":8796,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/tps51116.pdf","price":"$2.00 @ 1ku","product_introduction":"The TPS51116RGER from Texas Instruments is a complete DDR memory power supply solution in a 24-pin 4x4mm VQFN package. The RGE denotes VQFN-24 package, R denotes tape and reel (3000 pcs\/reel). The device integrates three functions needed for DDR memory power: (1) a synchronous buck controller for VDDQ generation from 3-28V input at up to 10A using external MOSFETs, operating at 400kHz fixed frequency in either D-CAP mode for fastest transient response or current mode for ceramic output capacitor compatibility; (2) a 3A sink\/source tracking LDO for VTT termination voltage that precisely tracks VTTREF\/2 with only 20uF ceramic output capacitor; and (3) a buffered low-noise 10mA VTTREF reference output at half VDDQ with +\/-20mV accuracy. The external VLDOIN pin allows connecting the LDO input to a lower voltage rail (like VDDQ itself) to significantly reduce LDO power dissipation. The device supports all DDR sleep states: S3 (suspend to RAM, VTT goes high-Z while VDDQ stays on) and S4\/S5 (suspend to disk, VDDQ\/VTT\/VTTREF all soft-off).","working_principle":"The TPS51116RGER operates through three power subsystems: (1) VDDQ Buck Controller: A synchronous buck controller drives external N-channel MOSFETs to generate VDDQ (2.5V for DDR, 1.8V for DDR2, 1.5V for DDR3, 1.35V for DDR3L, 1.2V for LPDDR3\/DDR4). The VDDQSET pin configures the output voltage. The controller uses adaptive on-time control at 400kHz, operating in D-CAP mode when COMP is tied to V5IN (fastest transient response, requires bulk output capacitors) or in current mode when a compensation network is connected to COMP (supports ceramic-only output capacitors). Current sensing uses either MOSFET RDS(ON) or an external sense resistor. (2) VTT LDO: A linear regulator generates VTT = VTTREF with 3A sink and source capability. The tracking architecture ensures VTT precisely follows VTTREF within +\/-20mV. The VLDOIN pin accepts an external supply (typically VDDQ or a lower voltage) to reduce the LDO headroom and thus power dissipation. Only 20uF ceramic output capacitor is required due to the fast LDO transient response. (3) VTTREF Buffer: A low-noise buffered reference output at VDDQ\/2 provides 10mA output current with +\/-20mV accuracy. A resistor divider from VDDQSNS sets the reference voltage.","pin_description":"
      Pin Group<\/th>Count<\/th>Type<\/th>Description<\/th><\/tr>
      Buck Control<\/td>6<\/td>I\/O<\/td>DRVH, DRVL, VBST, LL, CS, COMP<\/td><\/tr>
      VDDQ Feedback<\/td>2<\/td>Input<\/td>VDDQSNS, VDDQSET<\/td><\/tr>
      LDO (VTT)<\/td>4<\/td>I\/O<\/td>VTT, VTTSNS, VTTGND, VLDOIN<\/td><\/tr>
      VTTREF<\/td>1<\/td>Output<\/td>Buffered reference output<\/td><\/tr>
      Control<\/td>4<\/td>Input<\/td>S3, S5, MODE, PGOOD<\/td><\/tr>
      Power<\/td>4<\/td>Power<\/td>V5IN, GND, PGND, VDDQSET<\/td><\/tr><\/table>","application_scenarios":"
      • DDR3 memory power for embedded processor with 5V input buck generating 1.5V VDDQ, 3A VTT LDO, and VTTREF buffer<\/li>
      • DDR4 laptop memory with 12V input, 1.2V VDDQ, VLDOIN connected to VDDQ to minimize LDO loss, and S3\/S4 sleep control<\/li>
      • LPDDR3 mobile platform with 3.3V input, 1.2V VDDQ in D-CAP mode with ceramic capacitors, and 20uF VTT output<\/li>
      • Industrial DDR2 memory with 24V input, 1.8V VDDQ at 10A, current mode with external sense resistor, and PGOOD monitoring<\/li><\/ul>","alternative_models":"
        Model<\/th>Manufacturer<\/th>DDR Support<\/th>Package<\/th>Notes<\/th><\/tr>
        TPS51200A<\/td>TI<\/td>DDR2\/3<\/td>HTSSOP-20<\/td>VTT LDO only (no buck)<\/td><\/tr>
        TPS51916<\/td>TI<\/td>DDR3\/4<\/td>VQFN-24<\/td>Newer, enhanced features<\/td><\/tr>
        ISL6271<\/td>Renesas<\/td>DDR2\/3<\/td>QFN-24<\/td>Similar integrated solution<\/td><\/tr>
        NCP51400<\/td>onsemi<\/td>DDR3\/4<\/td>QFN-20<\/td>VTT LDO with tracking<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/5455","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=5455"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/5455\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=5455"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=5455"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=5455"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=5455"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}