{"id":3580,"date":"2026-06-06T10:57:51","date_gmt":"2026-06-06T10:57:51","guid":{"rendered":"https:\/\/materialparts.com\/cy7c1061av33-10zxi\/"},"modified":"2026-06-06T10:57:51","modified_gmt":"2026-06-06T10:57:51","slug":"cy7c1061av33-10zxi","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/cy7c1061av33-10zxi\/","title":{"rendered":"CY7C1061AV33-10ZXI"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The CY7C1061AV33-10ZXI from Infineon Technologies (formerly Cypress) is a 16 Mbit (1M x 16-bit) asynchronous SRAM with 10 ns access time. Operating at 3.3V, it features dual chip enables for easy bank selection, byte enable (BHE\/BLE) for 8-bit or 16-bit access, and automatic power-down in a 48-pin TSOP I package.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>\u0627\u0644\u0646\u0648\u0639<\/td>\n<td>16 Mbit Asynchronous SRAM<\/td>\n<\/tr>\n<tr>\n<td>Organization<\/td>\n<td>1M x 16 bits<\/td>\n<\/tr>\n<tr>\n<td>Access Time<\/td>\n<td>10 ns (-10 speed grade)<\/td>\n<\/tr>\n<tr>\n<td>\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n<td>3.0V &#8211; 3.6V<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u0648\u0627\u062c\u0647\u0629<\/td>\n<td>Parallel (address + data bus)<\/td>\n<\/tr>\n<tr>\n<td>Chip Enables<\/td>\n<td>2 (CE1, CE2) for bank select<\/td>\n<\/tr>\n<tr>\n<td>Byte Enables<\/td>\n<td>BHE, BLE (high\/low byte)<\/td>\n<\/tr>\n<tr>\n<td>Operating Current<\/td>\n<td>260 mA (max, active)<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062a\u064a\u0627\u0631 \u0627\u0644\u0627\u062d\u062a\u064a\u0627\u0637\u064a<\/td>\n<td>50 mA (TTL inputs, CE deselected)<\/td>\n<\/tr>\n<tr>\n<td>Power-Down<\/td>\n<td>Automatic (CMOS input levels)<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>48-pin TSOP I (12 x 18.4 mm)<\/td>\n<\/tr>\n<tr>\n<td>Operating Temp<\/td>\n<td>-40 to 85 C (industrial)<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>16 Mbit (1M x 16) density with fast 10 ns access time<\/li>\n<li>Dual chip enables (CE1, CE2) for flexible memory banking<\/li>\n<li>Byte-enable controls (BHE\/BLE) for 8-bit or 16-bit access<\/li>\n<li>Automatic CE power-down reduces standby current with CMOS inputs<\/li>\n<li>3.3V supply with 5V-tolerant inputs<\/li>\n<li>Fully static operation: no clock or refresh required<\/li>\n<li>Easy memory expansion with CE and byte-enable controls<\/li>\n<li>Industrial temperature range -40 to 85 C<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>Networking equipment packet buffering<\/li>\n<li>Embedded systems requiring fast scratchpad memory<\/li>\n<li>Industrial control data acquisition buffers<\/li>\n<li>DSP external program and data memory<\/li>\n<li>Telecommunications frame buffering<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The CY7C1061AV33-10ZXI from Infineon Technologies (formerly Cypress) is a 16 Mbit (1M x 16-bit) asynchronous SRAM with 10 ns access time. Operating at 3.3V, it features dual chip enables for easy bank selection, byte enable (BHE\/BLE) for 8-bit or 16-bit access, and automatic power-down in a 48-pin TSOP I package. Key Specifications Type [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[26,13],"tags":[],"chip_brand":[173],"class_list":["post-3580","post","type-post","status-publish","format-standard","hentry","category-digital-signal-processors-dsp","category-integrated-circuits-ics","chip_brand-infineon"],"acf":{"brief_explanation":"16Mbit async SRAM, 1Mx16, 10ns access, dual CE, byte enable, TSOP-48, 3.3V","date_code":"","package_case":"48-pin TSOP I (12.0 x 18.4 x 1.0 mm)","in_stock":11439,"datasheet":"https:\/\/www.infineon.com\/dgdl\/Infineon-CY7C1061G_CY7C1061GE-16-Mbit-DataSheet-v09_00-EN.pdf","price":"$3.50 @ 1ku","product_introduction":"The CY7C1061AV33-10ZXI from Infineon Technologies (formerly Cypress Semiconductor) is a 16 Mbit (1,048,576 x 16-bit) asynchronous static RAM with 10 ns access time. Organized as 1M words of 16 bits each, it features dual chip-enable inputs (CE1, CE2) for flexible memory bank selection without external decode logic, and byte-enable controls (BHE, BLE) for individual high-byte and low-byte access. The device operates from a 3.0V to 3.6V supply and provides automatic CE power-down when deselected, reducing standby current with CMOS input levels. The 48-pin TSOP I package provides a compact footprint for space-constrained board designs.","working_principle":"The CY7C1061AV33-10ZXI is a fully static asynchronous SRAM requiring no clock or refresh cycle. Read operation is initiated by asserting CE1 low and CE2 high, with the 20-bit address (A0-A19) selecting one of 1M locations. The OE (Output Enable) gate controls data output timing; access time from address valid to data output is 10 ns. Write operation is initiated by asserting WE low with CE active; data on the I\/O bus is written to the addressed location. The BHE and BLE pins control which byte of the 16-bit word is accessed: BHE enables the high byte (I\/O8-I\/O15) and BLE enables the low byte (I\/O0-I\/O7). Both bytes can be accessed simultaneously for 16-bit operations. When CE1 is deasserted high or CE2 is driven low, the device enters automatic power-down mode, disabling the address decoders and reducing supply current. The output drivers are placed in a high-impedance state during deselection or write operations.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Function<\/th><\/tr><tr><td>A0-A19<\/td><td>20<\/td><td>Input<\/td><td>Address inputs<\/td><\/tr><tr><td>I\/O0-I\/O15<\/td><td>16<\/td><td>I\/O<\/td><td>Data bus (bidirectional)<\/td><\/tr><tr><td>CE1<\/td><td>1<\/td><td>Input<\/td><td>Chip enable 1 (active low)<\/td><\/tr><tr><td>CE2<\/td><td>1<\/td><td>Input<\/td><td>Chip enable 2 (active high)<\/td><\/tr><tr><td>WE<\/td><td>1<\/td><td>Input<\/td><td>Write enable (active low)<\/td><\/tr><tr><td>OE<\/td><td>1<\/td><td>Input<\/td><td>Output enable (active low)<\/td><\/tr><tr><td>BLE<\/td><td>1<\/td><td>Input<\/td><td>Byte low enable (active low)<\/td><\/tr><tr><td>BHE<\/td><td>1<\/td><td>Input<\/td><td>Byte high enable (active low)<\/td><\/tr><tr><td>VDD<\/td><td>4<\/td><td>Power<\/td><td>3.3V supply<\/td><\/tr><tr><td>GND<\/td><td>6<\/td><td>Ground<\/td><td>Ground<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Networking: Packet buffering and lookup tables with 10 ns access for line-rate processing<\/li><li>Embedded systems: Fast scratchpad memory for DSP algorithms and data buffers<\/li><li>Industrial control: High-speed data acquisition buffers for real-time sampling<\/li><li>DSP memory: External program and data memory for 16-bit signal processors<\/li><li>Telecom: Frame buffering and switching fabric memory with byte-enable control<\/li><\/ul>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>Infineon<\/td><td>CY7C1061AV33-12ZXI<\/td><td>TSOP-48<\/td><td>12 ns version, lower cost<\/td><\/tr><tr><td>Infineon<\/td><td>CY7C1061CV33-10ZSXI<\/td><td>TSOP-54<\/td><td>54-pin with dual CE, 10 ns<\/td><\/tr><tr><td>ISSI<\/td><td>IS61WV102416BLL-10TLI<\/td><td>TSOP-48<\/td><td>1Mx16 SRAM, 10 ns, 3.3V<\/td><\/tr><tr><td>Renesas<\/td><td>R1LV1616RSA-10SI<\/td><td>TSOP-48<\/td><td>1Mx16 SRAM, 10 ns, 3.3V<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/3580","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=3580"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/3580\/revisions"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=3580"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=3580"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=3580"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=3580"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}