{"id":2144,"date":"2026-05-14T06:30:39","date_gmt":"2026-05-14T06:30:39","guid":{"rendered":"https:\/\/materialparts.com\/mmpf0100f0aep\/"},"modified":"2026-05-14T06:30:39","modified_gmt":"2026-05-14T06:30:39","slug":"mmpf0100f0aep","status":"publish","type":"post","link":"https:\/\/materialparts.com\/ar\/mmpf0100f0aep\/","title":{"rendered":"MMPF0100F0F0AEP"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

\u0625\u0646 MMPF0100F0AEP \u0639\u0628\u0627\u0631\u0629 \u0639\u0646 \u062f\u0627\u0626\u0631\u0629 \u0645\u062a\u0643\u0627\u0645\u0644\u0629 \u0644\u0625\u062f\u0627\u0631\u0629 \u0627\u0644\u0637\u0627\u0642\u0629 (PMIC) \u0642\u0627\u0628\u0644\u0629 \u0644\u0644\u062a\u0643\u0648\u064a\u0646 \u0645\u0643\u0648\u0646\u0629 \u0645\u0646 14 \u0642\u0646\u0627\u0629 \u0645\u0635\u0646\u0639\u0629 \u0645\u0646 \u0642\u0628\u0644 \u0634\u0631\u0643\u0629 NXP Semiconductors. \u062a\u0645 \u062a\u0635\u0645\u064a\u0645\u0647\u0627 \u062d\u0648\u0644 \u0645\u0646\u0635\u0629 \u062a\u0642\u0646\u064a\u0629 SMARTMOS\u060c \u0648\u0647\u064a \u062a\u0648\u0641\u0631 \u0628\u0646\u064a\u0629 \u0642\u0627\u0628\u0644\u0629 \u0644\u0644\u0628\u0631\u0645\u062c\u0629 \u0648\u0627\u0644\u062a\u0643\u0648\u064a\u0646 \u0628\u062f\u0631\u062c\u0629 \u0639\u0627\u0644\u064a\u0629 \u0645\u0639 \u0623\u062c\u0647\u0632\u0629 \u0637\u0627\u0642\u0629 \u0645\u062f\u0645\u062c\u0629 \u0628\u0627\u0644\u0643\u0627\u0645\u0644 \u0648\u0645\u0643\u0648\u0646\u0627\u062a \u062e\u0627\u0631\u062c\u064a\u0629 \u0642\u0644\u064a\u0644\u0629. \u062a\u062f\u0645\u062c PF0100 \u0627\u0644\u0645\u0628\u0631\u0645\u062c\u0629 \u0645\u0633\u0628\u0642\u064b\u0627 \u0645\u0639 \u062a\u0643\u0648\u064a\u0646 F0 OTP \u0644\u0645\u0639\u0627\u0644\u062c\u0627\u062a i.MX 6Quad\/Dual\u060c \u0645\u0627 \u064a\u0635\u0644 \u0625\u0644\u0649 \u0633\u062a\u0629 \u0645\u062d\u0648\u0644\u0627\u062a \u0628\u0627\u0643 \u0648\u0633\u0628\u0639\u0629 \u0645\u0646\u0638\u0645\u0627\u062a \u062e\u0637\u064a\u0629 \u0648\u0645\u0646\u0638\u0645 \u062a\u0639\u0632\u064a\u0632 \u0648\u0645\u0646\u0638\u0645 RTC \u0645\u0639 \u0634\u0627\u062d\u0646 \u062e\u0644\u064a\u0629 \u0639\u0645\u0644\u0629 \u0648\u0645\u0631\u062c\u0639 \u062c\u0647\u062f DDR \u0641\u064a \u062d\u0632\u0645\u0629 HVQFN-56 (8 \u00d7 8 \u0645\u0645) \u0645\u062f\u0645\u062c\u0629\u060c \u0645\u0645\u0627 \u064a\u0648\u0641\u0631 \u062d\u0644 \u0637\u0627\u0642\u0629 \u0643\u0627\u0645\u0644 \u0623\u062d\u0627\u062f\u064a \u0627\u0644\u0634\u0631\u064a\u062d\u0629 \u0644\u0645\u0646\u0635\u0627\u062a MCU \u0627\u0644\u0645\u062f\u0645\u062c\u0629.<\/p>\n

\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\u0627\u0644\u0634\u0631\u0643\u0629 \u0627\u0644\u0645\u0635\u0646\u0639\u0629<\/td>\n\u0623\u0634\u0628\u0627\u0647 \u0627\u0644\u0645\u0648\u0635\u0644\u0627\u062a NXP<\/td>\n<\/tr>\n
\u0646\u0637\u0627\u0642 \u062c\u0647\u062f \u0627\u0644\u0625\u062f\u062e\u0627\u0644<\/td>\n2.8 \u0641\u0648\u0644\u062a \u0625\u0644\u0649 4.5 \u0641\u0648\u0644\u062a<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u062f \u0627\u0644\u0623\u0642\u0635\u0649 \u0644\u062a\u064a\u0627\u0631 \u0627\u0644\u0625\u062e\u0631\u0627\u062c \u0627\u0644\u0623\u0642\u0635\u0649<\/td>\n4.5 A<\/td>\n<\/tr>\n
\u0639\u062f\u062f \u0645\u0646\u0638\u0645\u0627\u062a \u0628\u0627\u0643<\/td>\n6 (\u0642\u0627\u0628\u0644 \u0644\u0644\u062a\u0643\u0648\u064a\u0646 \u0645\u0646 4 \u0625\u0644\u0649 6 \u0645\u062e\u0631\u062c\u0627\u062a \u0645\u0633\u062a\u0642\u0644\u0629)<\/td>\n<\/tr>\n
\u0639\u062f\u062f \u0648\u062d\u062f\u0627\u062a \u062e\u0641\u0636 \u0627\u0644\u0627\u0646\u0628\u0639\u0627\u062b\u0627\u062a \u0627\u0644\u0645\u0646\u062e\u0641\u0636\u0629 \u0627\u0644\u0643\u062b\u0627\u0641\u0629<\/td>\n7<\/td>\n<\/tr>\n
\u0645\u062e\u0631\u062c \u0645\u0646\u0638\u0645 \u0627\u0644\u062a\u0639\u0632\u064a\u0632<\/td>\n5.0 \u0641\u0648\u0644\u062a \u0625\u0644\u0649 5.15 \u0641\u0648\u0644\u062a\u060c 600 \u0645\u0644\u0644\u064a \u0623\u0645\u0628\u064a\u0631<\/td>\n<\/tr>\n
\u0639\u062f\u062f \u0627\u0644\u0642\u0646\u0648\u0627\u062a<\/td>\n14<\/td>\n<\/tr>\n
\u062a\u0631\u062f\u062f \u0627\u0644\u062a\u062d\u0648\u064a\u0644<\/td>\n2.0 \u0645\u064a\u062c\u0627 \u0647\u0631\u062a\u0632 (LV Bucks)<\/td>\n<\/tr>\n
\u062a\u0643\u0648\u064a\u0646 OTP<\/td>\nF0 (\u0645\u0628\u0631\u0645\u062c \u0645\u0633\u0628\u0642\u064b\u0627 \u0644 i.MX 6Q\/D)<\/td>\n<\/tr>\n
\u0627\u0644\u0648\u0627\u062c\u0647\u0629<\/td>\nI2C<\/td>\n<\/tr>\n
\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n-40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nHVQFN-56 (8 \u00d7 8 \u00d7 8 \u00d7 0.85 \u0645\u0645)<\/td>\n<\/tr>\n
\u0633\u0639\u0631 \u0627\u0644\u0645\u064a\u0632\u0627\u0646\u064a\u0629<\/td>\n$3.42 @ 1KU<\/td>\n<\/tr>\n<\/table>\n

\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n
    \n
  • \u0645\u0646 \u0623\u0631\u0628\u0639\u0629 \u0625\u0644\u0649 \u0633\u062a\u0629 \u0645\u062d\u0648\u0644\u0627\u062a \u0628\u0627\u0643 \u0645\u0639 \u062e\u064a\u0627\u0631\u0627\u062a \u062a\u0643\u0648\u064a\u0646 \u0623\u062d\u0627\u062f\u064a\u0629\/\u062b\u0646\u0627\u0626\u064a\u0629 \u0627\u0644\u0637\u0648\u0631 \u0648\u0645\u062a\u0648\u0627\u0632\u064a\u0629<\/li>\n
  • SW1A\/B\/C \u0642\u0627\u0628\u0644 \u0644\u0644\u062a\u0643\u0648\u064a\u0646 \u062d\u062a\u0649 4.5 \u0623\u0645\u0628\u064a\u0631 \u0644\u0625\u0645\u062f\u0627\u062f \u0646\u0648\u0627\u0629 \u0627\u0644\u0645\u0639\u0627\u0644\u062c \u0628\u0627\u0644\u062a\u064a\u0627\u0631 \u0627\u0644\u0639\u0627\u0644\u064a<\/li>\n
  • \u064a\u062f\u0639\u0645 SW4 \u0648\u0636\u0639 \u062a\u062a\u0628\u0639 \u0625\u0646\u0647\u0627\u0621 DDR<\/li>\n
  • \u064a\u0648\u0641\u0631 \u0645\u0646\u0638\u0645 \u0627\u0644\u062a\u0639\u0632\u064a\u0632 (SWBST) 5.0 \u0641\u0648\u0644\u062a \u0639\u0646\u062f 600 \u0645\u0644\u0644\u064a \u0623\u0645\u0628\u064a\u0631 \u0645\u0639 \u062f\u0639\u0645 USB-OTG<\/li>\n
  • \u0633\u0628\u0639\u0629 \u0630\u0628\u0630\u0628\u0627\u062a \u0637\u0627\u0642\u0629 \u0645\u0646\u062e\u0641\u0636\u0629 \u0645\u0646\u062e\u0641\u0636\u0629 \u0645\u0646\u062e\u0641\u0636\u0629 \u0644\u0644\u0623\u063a\u0631\u0627\u0636 \u0627\u0644\u0639\u0627\u0645\u0629 \u0645\u0639 \u062c\u0647\u062f \u062e\u0631\u062c \u0642\u0627\u0628\u0644 \u0644\u0644\u0628\u0631\u0645\u062c\u0629<\/li>\n
  • \u0630\u0627\u0643\u0631\u0629 \u0642\u0627\u0628\u0644\u0629 \u0644\u0644\u0628\u0631\u0645\u062c\u0629 \u0644\u0645\u0631\u0629 \u0648\u0627\u062d\u062f\u0629 \u0639\u0644\u0649 \u0627\u0644\u0631\u0642\u0627\u0642\u0629 (OTP) \u0644\u062a\u0643\u0648\u064a\u0646 \u0627\u0644\u062c\u0647\u0627\u0632<\/li>\n
  • \u201c\u0645\u064a\u0632\u0629 \u0627\u0644\u0646\u0645\u0627\u0630\u062c \u0627\u0644\u0623\u0648\u0644\u064a\u0629 \u201d\u062c\u0631\u0628 \u0642\u0628\u0644 \u0627\u0644\u0634\u0631\u0627\u0621\" \u0644\u0627\u062e\u062a\u0628\u0627\u0631 \u0627\u0644\u062a\u0633\u0644\u0633\u0644\u0627\u062a \u0642\u0628\u0644 \u0627\u0644\u0628\u0631\u0645\u062c\u0629 \u0627\u0644\u0646\u0647\u0627\u0626\u064a\u0629<\/li>\n
  • \u0634\u0627\u062d\u0646 \u0627\u0644\u062e\u0644\u0627\u064a\u0627 \u0627\u0644\u0645\u0639\u062f\u0646\u064a\u0629 \u0648\u0645\u0632\u0648\u062f \u0637\u0627\u0642\u0629 \u0627\u062d\u062a\u064a\u0627\u0637\u064a\u0629 (VSNVS) \u0645\u0639 \u062a\u0628\u062f\u064a\u0644 \u0627\u0644\u0637\u0627\u0642\u0629 \u0627\u0644\u0627\u062d\u062a\u064a\u0627\u0637\u064a\u0629<\/li>\n
  • \u0627\u0644\u062c\u0647\u062f \u0627\u0644\u0643\u0647\u0631\u0628\u064a \u0627\u0644\u0645\u0631\u062c\u0639\u064a \u0644\u0630\u0627\u0643\u0631\u0629 DDR (VREFDDR) \u0645\u0646 0.6 \u0641\u0648\u0644\u062a \u0625\u0644\u0649 0.9 \u0641\u0648\u0644\u062a<\/li>\n
  • \u0648\u0627\u062c\u0647\u0629 I2C \u0644\u062a\u0648\u0633\u064a\u0639 \u0646\u0637\u0627\u0642 \u0627\u0644\u062c\u0647\u062f \u0627\u0644\u062f\u064a\u0646\u0627\u0645\u064a\u0643\u064a \u0648\u0627\u0644\u062a\u062d\u0643\u0645 \u0641\u064a \u0627\u0644\u0633\u062c\u0644<\/li>\n
  • \u062a\u0633\u0644\u0633\u0644 \u0628\u062f\u0621 \u0627\u0644\u062a\u0634\u063a\u064a\u0644 \u0627\u0644\u0642\u0627\u0628\u0644 \u0644\u0644\u0628\u0631\u0645\u062c\u0629 \u0648\u0627\u0644\u062a\u0648\u0642\u064a\u062a \u0645\u0639 \u0623\u0648\u0636\u0627\u0639 \u0627\u0644\u062a\u0634\u063a\u064a\u0644\/\u0625\u064a\u0642\u0627\u0641 \u0627\u0644\u062a\u0634\u063a\u064a\u0644\/\u0627\u0644\u0627\u0633\u062a\u0639\u062f\u0627\u062f \u0627\u0644\u0641\u0631\u062f\u064a\u0629<\/li>\n
  • \u0642\u064a\u0627\u0633 \u0627\u0644\u062c\u0647\u062f \u0627\u0644\u062f\u064a\u0646\u0627\u0645\u064a\u0643\u064a (DVS) \u0644\u0636\u0628\u0637 \u0627\u0644\u062c\u0647\u062f \u0627\u0644\u0623\u0633\u0627\u0633\u064a \u0644\u0644\u0645\u0639\u0627\u0644\u062c<\/li>\n
  • \u0627\u0643\u062a\u0634\u0627\u0641 \u0634\u0627\u0645\u0644 \u0644\u0644\u0623\u0639\u0637\u0627\u0644: \u0627\u0644\u062d\u0645\u0627\u064a\u0629 \u0645\u0646 \u0627\u0644\u062a\u064a\u0627\u0631 \u0627\u0644\u0632\u0627\u0626\u062f\u060c \u0648\u0642\u0635\u0631 \u0627\u0644\u062f\u0627\u0626\u0631\u0629\u060c \u0648\u0627\u0644\u062d\u0645\u0627\u064a\u0629 \u0627\u0644\u062d\u0631\u0627\u0631\u064a\u0629<\/li>\n
  • \u0633\u0627\u0639\u0629 \u0631\u0626\u064a\u0633\u064a\u0629 \u062f\u0627\u062e\u0644\u064a\u0629 \u0628\u0633\u0631\u0639\u0629 16 \u0645\u064a\u062c\u0627\u0647\u0631\u062a\u0632 \u0645\u0639 \u062a\u0631\u062f\u062f\u0627\u062a \u062a\u0628\u062f\u064a\u0644 \u0642\u0627\u0628\u0644\u0629 \u0644\u0644\u062a\u0643\u0648\u064a\u0646<\/li>\n<\/ul>\n

    \u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
      \n
    • \u0627\u0644\u0623\u062c\u0647\u0632\u0629 \u0627\u0644\u0644\u0648\u062d\u064a\u0629 \u0648\u0623\u062c\u0647\u0632\u0629 \u0627\u0644\u0642\u0631\u0627\u0621\u0629 \u0627\u0644\u0625\u0644\u0643\u062a\u0631\u0648\u0646\u064a\u0629 \u0627\u0644\u062a\u064a \u062a\u0639\u0645\u0644 \u0628\u0645\u0639\u0627\u0644\u062c\u0627\u062a i.MX 6<\/li>\n
    • \u0645\u0646\u0635\u0627\u062a IPTV \u0648\u062c\u0647\u0627\u0632 \u0641\u0643 \u0627\u0644\u062a\u0634\u0641\u064a\u0631<\/li>\n
    • \u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062a\u062d\u0643\u0645 \u0627\u0644\u0635\u0646\u0627\u0639\u064a \u0648\u0623\u062a\u0645\u062a\u0629 \u0627\u0644\u0645\u0635\u0627\u0646\u0639<\/li>\n
    • \u0645\u0639\u062f\u0627\u062a \u0627\u0644\u0645\u0631\u0627\u0642\u0628\u0629 \u0627\u0644\u0637\u0628\u064a\u0629<\/li>\n
    • \u0627\u0644\u062a\u0634\u063a\u064a\u0644 \u0627\u0644\u0622\u0644\u064a \u0644\u0644\u0645\u0646\u0632\u0644\u060c \u0648\u0627\u0644\u0625\u0646\u0630\u0627\u0631\u060c \u0648\u0625\u062f\u0627\u0631\u0629 \u0627\u0644\u0637\u0627\u0642\u0629<\/li>\n
    • \u0623\u062c\u0647\u0632\u0629 \u0627\u0644\u0645\u0639\u0644\u0648\u0645\u0627\u062a \u0648\u0627\u0644\u062a\u0631\u0641\u064a\u0647 \u0641\u064a \u0627\u0644\u0633\u064a\u0627\u0631\u0627\u062a \u0648\u0645\u062c\u0645\u0648\u0639\u0627\u062a \u0627\u0644\u0639\u062f\u0627\u062f\u0627\u062a<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The MMPF0100F0AEP is a 14-channel configurable Power Management Integrated Circuit (PMIC) manufactured by NXP Semiconductors. Designed around the SMARTMOS technology platform, it provides a highly programmable and configurable architecture with fully integrated power devices and minimal external components. Pre-programmed with the F0 OTP configuration for i.MX 6Quad\/Dual processors, the PF0100 integrates up to […]<\/p>\n","protected":false},"author":2,"featured_media":2177,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,29],"tags":[],"chip_brand":[168],"class_list":["post-2144","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-integrated-circuits-ics","category-power-management-ics-pmic","chip_brand-nxp"],"acf":{"brief_explanation":"14-channel configurable PMIC, 6 buck + 7 LDO + boost, F0 OTP pre-programmed for i.MX 6Q\/D, 4.5 A max, HVQFN-56","date_code":"","package_case":"HVQFN-56 (8 x 8 x 0.85 mm, 0.5 mm pitch)","in_stock":5183,"datasheet":"https:\/\/www.nxp.com\/part\/MMPF0100F0AEP","price":"$3.42 @ 1ku","product_introduction":"The MMPF0100F0AEP is NXP's flagship 14-channel configurable Power Management Integrated Circuit from the PF0100 series, built on SMARTMOS technology. It is pre-programmed with the F0 OTP configuration, specifically designed to power NXP i.MX 6Quad and i.MX 6Dual application processors in consumer and industrial applications. The device integrates six buck converters (SW1A\/B\/C configurable up to 4.5 A for processor cores, SW2 at 2.0 A for system rails, SW3A\/B configurable at 2.5 A, and SW4 at 1.0 A with DDR tracking), a boost regulator (SWBST) delivering 5.0 V at 600 mA for USB-OTG supply, seven general-purpose LDOs (VGEN1-VGEN6 plus VSNVS) for peripheral power, and a VREFDDR reference for DDR memory termination. The on-chip OTP memory enables pre-configured start-up sequences and voltage settings, while the \"Try Before Buy\" feature allows designers to prototype different configurations before committing to final OTP programming. With its I2C interface, dynamic voltage scaling, programmable sequencing, and comprehensive fault protection, the MMPF0100F0AEP provides a complete single-chip power management solution that simplifies system design and reduces bill-of-materials count.","working_principle":"

      Power Generation Subsystem<\/h3>\n

      The PF0100 PMIC generates all required supply rails from a single 2.8 V to 4.5 V input. The buck converters use PWM\/PFM\/APS modes for efficiency across load ranges: SW1A\/B\/C can be configured as single-phase (4.5 A), dual-phase, or independent converters to supply processor core voltages (0.3 V to 1.875 V). SW2 (0.4 V to 3.3 V, 2.0 A) powers system rails like SATA-flash or NAND interfaces. SW3A\/B can operate in single-phase (2.5 A), dual-phase, or independent modes. SW4 (0.4 V to 3.3 V, 1.0 A) supports DDR termination tracking. The boost regulator SWBST generates 5.0 V to 5.15 V at 600 mA for USB-OTG from the main supply.<\/p>\n\n

      Linear Regulation and References<\/h3>\n

      Six general-purpose LDOs (VGEN1-VGEN6) provide clean power for peripherals such as audio codecs, cameras, HDMI, USB, and Ethernet. VGEN1\/VGEN2 cover 0.8 V to 1.55 V at 100 mA\/250 mA; VGEN3-VGEN6 cover 1.8 V to 3.3 V at 100 mA to 350 mA. VSNVS supplies the RTC\/SNVS domain (1.0 V to 3.0 V, 400 \u00b5A) with automatic switchover between main supply and coin cell. VREFDDR provides a precise 0.6 V to 0.9 V reference for DDR memory termination.<\/p>\n\n

      Control Logic and OTP Configuration<\/h3>\n

      The device is fully programmable via I2C (address configurable from 0x08 to 0x0F). The OTP memory stores the start-up sequence, voltage settings, timing, and phasing configuration. The F0 OTP variant is pre-programmed for i.MX 6Quad\/Dual reference designs. The \"Try Before Buy\" mechanism allows register-based configuration testing before permanent OTP fusing. PWRON supports level or edge-triggered mode. The state machine manages ON, OFF, standby, and sleep transitions with individually programmable regulator sequences.<\/p>\n\n

      Fault Detection and Protection<\/h3>\n

      Each switching regulator includes over-current protection (OCP) with fault interrupt generation. Thermal monitoring triggers alerts at 110 \u00b0C, 120 \u00b0C, 125 \u00b0C, and 130 \u00b0C thresholds. The interrupt system reports faults via I2C registers with separate sense, state, and mask registers for comprehensive system diagnostics.<\/p>","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>\n
      1<\/td>VIN<\/td>Input<\/td>Main supply voltage input (2.8 V to 4.5 V)<\/td><\/tr>\n
      2<\/td>VIN<\/td>Input<\/td>Main supply voltage input<\/td><\/tr>\n
      3<\/td>SW1AIN<\/td>Input<\/td>SW1A buck regulator input supply<\/td><\/tr>\n
      4<\/td>SW1ALX<\/td>Output<\/td>SW1A buck regulator switch node<\/td><\/tr>\n
      5<\/td>SW1AFB<\/td>Input<\/td>SW1A buck regulator feedback input<\/td><\/tr>\n
      6<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      7<\/td>SW1BIN<\/td>Input<\/td>SW1B buck regulator input supply<\/td><\/tr>\n
      8<\/td>SW1BLX<\/td>Output<\/td>SW1B buck regulator switch node<\/td><\/tr>\n
      9<\/td>SW1CIN<\/td>Input<\/td>SW1C buck regulator input supply<\/td><\/tr>\n
      10<\/td>SW1CLX<\/td>Output<\/td>SW1C buck regulator switch node<\/td><\/tr>\n
      11<\/td>SW1CFB<\/td>Input<\/td>SW1C buck regulator feedback input<\/td><\/tr>\n
      12<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      13<\/td>SW2IN<\/td>Input<\/td>SW2 buck regulator input supply<\/td><\/tr>\n
      14<\/td>SW2LX<\/td>Output<\/td>SW2 buck regulator switch node<\/td><\/tr>\n
      15<\/td>SW2FB<\/td>Input<\/td>SW2 buck regulator feedback input<\/td><\/tr>\n
      16<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      17<\/td>SW3AIN<\/td>Input<\/td>SW3A buck regulator input supply<\/td><\/tr>\n
      18<\/td>SW3ALX<\/td>Output<\/td>SW3A buck regulator switch node<\/td><\/tr>\n
      19<\/td>SW3AFB<\/td>Input<\/td>SW3A buck regulator feedback input<\/td><\/tr>\n
      20<\/td>SW3BIN<\/td>Input<\/td>SW3B buck regulator input supply<\/td><\/tr>\n
      21<\/td>SW3BLX<\/td>Output<\/td>SW3B buck regulator switch node<\/td><\/tr>\n
      22<\/td>SW3BFB<\/td>Input<\/td>SW3B buck regulator feedback input<\/td><\/tr>\n
      23<\/td>SW4IN<\/td>Input<\/td>SW4 buck regulator input supply<\/td><\/tr>\n
      24<\/td>SW4LX<\/td>Output<\/td>SW4 buck regulator switch node<\/td><\/tr>\n
      25<\/td>SW4FB<\/td>Input<\/td>SW4 buck regulator feedback input<\/td><\/tr>\n
      26<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      27<\/td>SWBSTIN<\/td>Input<\/td>Boost regulator input supply<\/td><\/tr>\n
      28<\/td>SWBSTLX<\/td>Output<\/td>Boost regulator switch node<\/td><\/tr>\n
      29<\/td>SWBSTFB<\/td>Input<\/td>Boost regulator feedback input<\/td><\/tr>\n
      30<\/td>VGEN1<\/td>Output<\/td>LDO VGEN1 output (0.8 V to 1.55 V, 100 mA)<\/td><\/tr>\n
      31<\/td>VGEN2<\/td>Output<\/td>LDO VGEN2 output (0.8 V to 1.55 V, 250 mA)<\/td><\/tr>\n
      32<\/td>VGEN3<\/td>Output<\/td>LDO VGEN3 output (1.8 V to 3.3 V, 100 mA)<\/td><\/tr>\n
      33<\/td>VGEN4<\/td>Output<\/td>LDO VGEN4 output (1.8 V to 3.3 V, 350 mA)<\/td><\/tr>\n
      34<\/td>VGEN5<\/td>Output<\/td>LDO VGEN5 output (1.8 V to 3.3 V, 100 mA)<\/td><\/tr>\n
      35<\/td>VSNVS<\/td>Output<\/td>SNVS\/RTC LDO-switch output (1.0 V to 3.0 V, 400 \u00b5A)<\/td><\/tr>\n
      36<\/td>VREFDDR<\/td>Output<\/td>DDR memory reference voltage (0.6 V to 0.9 V, 10 mA)<\/td><\/tr>\n
      37<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      38<\/td>PWRON<\/td>Input<\/td>Power-on control input (level or edge configurable)<\/td><\/tr>\n
      39<\/td>PWRON2<\/td>Input<\/td>Secondary power-on control input<\/td><\/tr>\n
      40<\/td>VIN<\/td>Input<\/td>Main supply voltage input<\/td><\/tr>\n
      41<\/td>VGEN6<\/td>Output<\/td>LDO VGEN6 output (1.8 V to 3.3 V, 200 mA)<\/td><\/tr>\n
      42<\/td>LICELL<\/td>I\/O<\/td>Coin cell supply input\/output (3.6 V analog)<\/td><\/tr>\n
      43<\/td>VIN<\/td>Input<\/td>Main supply voltage input<\/td><\/tr>\n
      44<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      45<\/td>SCL<\/td>Input<\/td>I2C serial clock input<\/td><\/tr>\n
      46<\/td>SDA<\/td>I\/O<\/td>I2C serial data input\/output<\/td><\/tr>\n
      47<\/td>TEST<\/td>Input<\/td>Test mode pin (connect to GND for normal operation)<\/td><\/tr>\n
      48<\/td>I2C_SEL<\/td>Input<\/td>I2C address select pin<\/td><\/tr>\n
      49<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      50<\/td>RESETBMCU<\/td>Output<\/td>MCU reset output (active low)<\/td><\/tr>\n
      51<\/td>RESETB<\/td>Output<\/td>System reset output (active low)<\/td><\/tr>\n
      52<\/td>ONOFF<\/td>Output<\/td>On\/Off control output to processor<\/td><\/tr>\n
      53<\/td>WDI<\/td>Input<\/td>Watchdog input from processor<\/td><\/tr>\n
      54<\/td>VDDOTP<\/td>Input<\/td>OTP programming voltage supply<\/td><\/tr>\n
      55<\/td>GND<\/td>Ground<\/td>Ground<\/td><\/tr>\n
      56<\/td>COREGEN<\/td>Input<\/td>Internal core voltage generation control<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • Tablet and eReader platforms powered by NXP i.MX 6 series processors, requiring multi-rail power with sequenced start-up<\/li>\n
      • IPTV and set-top box systems needing a complete PMIC solution with USB-OTG boost supply and DDR memory reference<\/li>\n
      • Industrial control and factory automation equipment requiring robust, configurable power management with OTP-stored configurations<\/li>\n
      • Medical monitoring devices demanding low-noise LDO rails for analog sensors alongside high-current buck regulators for processor cores<\/li>\n
      • Automotive infotainment and cluster systems leveraging the F0 pre-programmed OTP for i.MX 6Quad\/Dual reference designs<\/li>\n<\/ul>","alternative_models":"\n
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>\n
        NXP<\/td>MMPF0100F2AEP<\/td>HVQFN-56<\/td>F2 OTP config, consumer grade, -40 to 85 \u00b0C<\/td><\/tr>\n
        NXP<\/td>MMPF0100F4AEP<\/td>HVQFN-56<\/td>F4 OTP config, consumer grade, -40 to 85 \u00b0C<\/td><\/tr>\n
        NXP<\/td>MMPF0100F0ANES<\/td>HVQFN-56 (wettable flank)<\/td>F0 OTP, extended industrial -40 to 105 \u00b0C, AEC-Q100<\/td><\/tr>\n
        NXP<\/td>MMPF0100NPAEP<\/td>HVQFN-56<\/td>Non-programmed OTP, user-customizable configuration<\/td><\/tr>\n
        NXP<\/td>MMPF0200F0AEP<\/td>HVQFN-56<\/td>12-channel PMIC, reduced version for i.MX 6SoloLite\/Solo\/DualLite<\/td><\/tr>\n
        Renesas<\/td>ISL91302B<\/td>WLCSP-42<\/td>Dual-phase buck PMIC, alternative for simpler power tree designs<\/td><\/tr>\n<\/table>"},"_links":{"self":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/2144","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/comments?post=2144"}],"version-history":[{"count":0,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/posts\/2144\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media\/2177"}],"wp:attachment":[{"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/media?parent=2144"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/categories?post=2144"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/tags?post=2144"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/materialparts.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=2144"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}