\u0625\u0646 FAN7392N \u0645\u0646 onsemi (\u0627\u0644\u0645\u0639\u0631\u0648\u0641\u0629 \u0633\u0627\u0628\u0642\u064b\u0627 \u0628\u0627\u0633\u0645 Fairchild) \u0639\u0628\u0627\u0631\u0629 \u0639\u0646 \u062f\u0627\u0626\u0631\u0629 \u0645\u062a\u0643\u0627\u0645\u0644\u0629 \u0645\u062a\u062c\u0627\u0646\u0633\u0629 \u0639\u0627\u0644\u064a\u0629 \u0648\u0645\u0646\u062e\u0641\u0636\u0629 \u0627\u0644\u062c\u0627\u0646\u0628 \u0644\u0645\u062d\u0631\u0643 \u0627\u0644\u0628\u0648\u0627\u0628\u0629 \u0641\u064a \u062d\u0632\u0645\u0629 PDIP \u0630\u0627\u062a 14 \u0633\u0646\u064b\u0627 \u0642\u0627\u062f\u0631\u0629 \u0639\u0644\u0649 \u0642\u064a\u0627\u062f\u0629 MOSFETs \u0648 IGBTs \u0627\u0644\u062a\u064a \u062a\u0639\u0645\u0644 \u062d\u062a\u0649 +600 \u0641\u0648\u0644\u062a. \u064a\u062a\u0645\u064a\u0632 \u0628\u062a\u064a\u0627\u0631 \u062e\u0631\u062c 3A\/3A \u0645\u0635\u062f\u0631\/\u0645\u0634\u062a\u062a \u062a\u064a\u0627\u0631 \u062e\u0631\u062c\u060c \u0648\u0645\u062f\u062e\u0644\u0627\u062a \u0645\u062a\u0648\u0627\u0641\u0642\u0629 \u0645\u0639 \u0645\u0646\u0637\u0642 3.3 \u0641\u0648\u0644\u062a\u060c \u0648\u0625\u0645\u062f\u0627\u062f \u0645\u0646\u0637\u0642 VDD \u0645\u0646\u0641\u0635\u0644 (3.3 \u0641\u0648\u0644\u062a \u0625\u0644\u0649 20 \u0641\u0648\u0644\u062a)\u060c \u0648\u0642\u0641\u0644 \u062a\u062d\u062a \u0627\u0644\u062c\u0647\u062f \u0644 VCC \u0648VBS\u060c \u0648\u0625\u064a\u0642\u0627\u0641 \u062a\u0634\u063a\u064a\u0644 \u064a\u0639\u0645\u0644 \u0639\u0644\u0649 \u0627\u0644\u062d\u0627\u0641\u0629 \u062f\u0648\u0631\u0629 \u0628\u062f\u0648\u0631\u0629\u060c \u0648\u062a\u0623\u062e\u064a\u0631 \u0627\u0646\u062a\u0634\u0627\u0631 \u0645\u062a\u0637\u0627\u0628\u0642 \u0644\u0643\u0644\u062a\u0627 \u0627\u0644\u0642\u0646\u0627\u062a\u064a\u0646\u060c \u0648\u0625\u0644\u063a\u0627\u0621 \u0636\u0648\u0636\u0627\u0621 \u0627\u0644\u0648\u0636\u0639 \u0627\u0644\u0645\u0634\u062a\u0631\u0643 dv\/dt. \u062a\u0628\u062f\u064a\u062f \u0627\u0644\u0637\u0627\u0642\u0629 1.6 \u0648\u0627\u0637. \u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644 -40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +125 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629. \u0645\u0644\u0627\u062d\u0638\u0629: \u0647\u0630\u0627 \u0627\u0644\u0645\u0646\u062a\u062c \u0641\u064a \u062d\u0627\u0644\u0629 \u0627\u0644\u0634\u062d\u0646\u0627\u062a \u0627\u0644\u0623\u062e\u064a\u0631\u0629.<\/p>","protected":false},"excerpt":{"rendered":"
The FAN7392N from onsemi (formerly Fairchild) is a monolithic high- and low-side gate drive IC in a 14-pin PDIP package capable of driving MOSFETs and IGBTs operating up to +600V. It features 3A\/3A source\/sink output current, 3.3V logic-compatible inputs, separate VDD logic supply (3.3V to 20V), under-voltage lockout for VCC and VBS, cycle-by-cycle edge-triggered shutdown, […]<\/p>\n","protected":false},"author":2,"featured_media":2252,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[144],"class_list":["post-2080","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-on"],"acf":{"brief_explanation":"600V high\/low-side gate driver, 3A\/3A, 3.3V logic, UVLO, shutdown, PDIP-14, Last Shipments","date_code":"","package_case":"PDIP-14 (19.3 x 6.35 x 4.57 mm, 2.54mm pitch, through-hole)","in_stock":0,"datasheet":"https:\/\/www.onsemi.com\/products\/power-management\/gate-drivers\/fan7392","price":"$0.857 (reference)","product_introduction":"The FAN7392N from onsemi (formerly Fairchild Semiconductor) is a monolithic high- and low-side gate drive IC in a 14-pin PDIP through-hole package. It can drive MOSFETs and IGBTs that operate up to +600V, making it suitable for half-bridge and full-bridge inverter applications. Note: This product is in Last Shipments status at onsemi, meaning it is approaching end-of-life and should not be designed into new products.\n\nThe FAN7392 provides independent high-side and low-side gate drive outputs (HO and LO), each capable of 3A source and 3A sink current. The buffered output stage uses all-NMOS transistors for high pulse current driving capability and minimum cross-conduction during switching transitions.\n\nThe high-side driver uses a bootstrap floating supply (VB-VS) that allows operation up to +600V. onsemi's high-voltage process and common-mode noise canceling techniques provide stable operation under high dv\/dt noise circumstances. The advanced level-shift circuit offers high-side gate driver operation down to VS = -9.8V (typical) for VBS = 15V, critical for motor drive applications where negative VS transients occur.\n\nLogic inputs (HIN, LIN, SD) are compatible with standard CMOS or LSTTL output, down to 3.3V logic. A separate VDD logic supply pin (3.3V to 20V) allows direct interfacing with 3.3V microcontrollers without level translation. The SD (shutdown) pin provides cycle-by-cycle edge-triggered shutdown for both channels, useful for overcurrent protection.\n\nThe under-voltage lockout (UVLO) circuit prevents malfunction when VCC (low-side supply) and VBS (high-side supply) are below the specified threshold voltage, ensuring the MOSFETs\/IGBTs are not driven into linear operation during power-up.\n\nThe propagation delay is matched for both channels (130 ns turn-on, 150 ns turn-off typical), enabling precise complementary switching in bridge configurations. The outputs are in-phase with the input signals (HIN=HIGH produces HO=HIGH).\n\nThe PDIP-14 package provides 1.6W power dissipation at 25C ambient with 75C\/W thermal resistance. For surface-mount applications, the FAN7392MX (SOIC-16W) variant is also available but also in Last Shipments status.\n\nFor new designs, onsemi recommends the FAN7390 or NCP51530 as replacement devices.","working_principle":"**Bootstrap High-Side Drive:** The high-side driver is powered by a bootstrap capacitor connected between VB and VS. When the low-side MOSFET is on, VS is near ground, and the bootstrap capacitor charges through the bootstrap diode from VCC. When the high-side MOSFET turns on, VS rises to the bus voltage, and the bootstrap capacitor provides the floating supply for the high-side driver. This eliminates the need for an isolated power supply.\n\n**Level Shifting:** The high-side driver is referenced to VS (the switch node), which swings between ground and the bus voltage at high dv\/dt. The level-shift circuit translates the ground-referenced logic signals to the floating high-side domain. The common-mode dv\/dt noise cancellation circuit prevents false triggering during these fast transitions.\n\n**Cycle-by-Cycle Shutdown:** The SD (shutdown) pin provides an edge-triggered shutdown function. When a rising edge is detected on SD, both HO and LO are forced LOW for the remainder of the switching cycle. The outputs resume normal operation on the next HIN\/LIN transition. This provides fast overcurrent protection without latching off the driver.\n\n**UVLO Protection:** Both VCC and VBS are monitored by under-voltage lockout circuits. If VCC drops below the UVLO threshold (approximately 9.2V typical), the low-side output is disabled. If VBS drops below its UVLO threshold (approximately 8.6V typical), the high-side output is disabled. This prevents the MOSFETs from being driven with insufficient gate voltage, which would cause excessive conduction losses and potential device failure.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | LO<\/td> | O<\/td> | Low-side gate drive output; connects to low-side MOSFET\/IGBT gate; 3A source\/3A sink; in-phase with LIN; driven from VCC supply<\/td><\/tr> | ||||||||||||||||||||||||
| 2<\/td> | COM<\/td> | G<\/td> | Low-side return; connects to MOSFET source (ground); star-point ground for driver; separate from logic ground<\/td><\/tr> | ||||||||||||||||||||||||
| 3<\/td> | VCC<\/td> | P<\/td> | Low-side supply; 10-20V; powers low-side driver and logic; decouple with 0.1uF + 1uF ceramic to COM; bootstrap diode anode connects here<\/td><\/tr> | ||||||||||||||||||||||||
| 5<\/td> | VS<\/td> | I\/O<\/td> | High-side floating supply return; connects to half-bridge switch node (junction of high-side source and low-side drain); swings 0 to bus voltage; must handle high dv\/dt<\/td><\/tr> | ||||||||||||||||||||||||
| 6<\/td> | VB<\/td> | P<\/td> | High-side floating supply; bootstrap capacitor positive terminal; connect bootstrap diode cathode and capacitor here; VBS = VB-VS = 10-20V<\/td><\/tr> | ||||||||||||||||||||||||
| 7<\/td> | HO<\/td> | O<\/td> | High-side gate drive output; connects to high-side MOSFET\/IGBT gate; 3A source\/3A sink; in-phase with HIN; driven from bootstrap supply<\/td><\/tr> | ||||||||||||||||||||||||
| 9<\/td> | VDD<\/td> | P<\/td> | Logic supply; 3.3V to 20V; powers input logic; allows direct 3.3V MCU interface; decouple with 0.1uF to VSS<\/td><\/tr> | ||||||||||||||||||||||||
| 10<\/td> | HIN<\/td> | I<\/td> | High-side logic input; CMOS\/LSTTL compatible; HIGH = HO HIGH; LOW = HO LOW; 3.3V logic compatible via VDD supply<\/td><\/tr> | ||||||||||||||||||||||||
| 11<\/td> | SD<\/td> | I<\/td> | Shutdown input; edge-triggered; rising edge shuts down both outputs for remainder of cycle; connect to overcurrent comparator output; active-HIGH<\/td><\/tr> | ||||||||||||||||||||||||
| 12<\/td> | LIN<\/td> | I<\/td> | Low-side logic input; CMOS\/LSTTL compatible; HIGH = LO HIGH; LOW = LO LOW; 3.3V logic compatible via VDD supply<\/td><\/tr> | ||||||||||||||||||||||||
| 13<\/td> | VSS<\/td> | G<\/td> | Logic ground; connect to PCB ground; reference for HIN, LIN, SD inputs; may differ from COM due to ground bounce<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
|