\u0625\u0646 NTJD4001NT1G \u0645\u0646 onsemi \u0639\u0628\u0627\u0631\u0629 \u0639\u0646 \u0642\u0646\u0627\u0629 N \u0645\u0632\u062f\u0648\u062c\u0629 N \u0630\u0627\u062a \u0648\u0636\u0639 \u0627\u0644\u062a\u0639\u0632\u064a\u0632 MOSFET \u062b\u0646\u0627\u0626\u064a\u0629 \u0627\u0644\u0642\u0646\u0627\u0629 \u0630\u0627\u062a \u0627\u0644\u0625\u0634\u0627\u0631\u0627\u062a \u0627\u0644\u0635\u063a\u064a\u0631\u0629 \u0641\u064a \u062d\u0632\u0645\u0629 SC-88 (SOT-363\/SC-70-6) \u0630\u0627\u062a 6 \u0633\u0646\u0648\u0646 (2.0 \u00d7 1.25 \u00d7 0.9 \u0645\u0645). \u062a\u0634\u062a\u0631\u0643 \u0643\u0644\u062a\u0627 \u0627\u0644\u0642\u0646\u0627\u062a\u064a\u0646 \u0641\u064a \u0645\u0635\u062f\u0631 \u0645\u0634\u062a\u0631\u0643 (\u0627\u0644\u062f\u0628\u0648\u0633 3). \u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629 \u0644\u0643\u0644 \u0642\u0646\u0627\u0629: 30 \u0641\u0648\u0644\u062a VDSS\u060c \u0648\u062a\u064a\u0627\u0631 \u062a\u0635\u0631\u064a\u0641 \u0645\u0633\u062a\u0645\u0631 250 \u0645\u0644\u0644\u064a \u0623\u0645\u0628\u064a\u0631\u060c \u06481.0 \u03a9 RDS (\u062a\u0634\u063a\u064a\u0644) \u0646\u0645\u0648\u0630\u062c\u064a \u0639\u0646\u062f VGS=4 \u0641\u0648\u0644\u062a\u060c \u06481.5 \u03a9 \u0643\u062d\u062f \u0623\u0642\u0635\u0649 RDS (\u062a\u0634\u063a\u064a\u0644) \u0639\u0646\u062f VGS=4 \u0641\u0648\u0644\u062a\u060c \u06481.2 \u0641\u0648\u0644\u062a \u0646\u0645\u0648\u0630\u062c\u064a VGS (th)\u060c \u06480.9 \u0646\u064a\u0648\u062a\u0646 \u0633\u0646\u062a\u064a\u0645\u062a\u0631 \u0645\u0643\u0639\u0628 \u0625\u062c\u0645\u0627\u0644\u064a \u0634\u062d\u0646 \u0627\u0644\u0628\u0648\u0627\u0628\u0629\u060c \u064820 pF \u0633\u0639\u0629 \u0645\u062f\u062e\u0644\u0627\u062a \u0633\u0639\u0629 20\u060c \u064817-ns \u062a\u0623\u062e\u064a\u0631 \u062a\u0634\u063a\u064a\u0644\u060c \u064882-ns \u0632\u0645\u0646 \u0633\u0642\u0648\u0637\u060c \u0648\u062a\u0628\u062f\u064a\u062f \u0637\u0627\u0642\u0629 272 \u0645\u064a\u062c\u0627\u0648\u0627\u062a. \u0628\u0648\u0627\u0628\u0629 \u0645\u062d\u0645\u064a\u0629 \u0636\u062f \u0627\u0644\u062a\u0641\u0631\u064a\u063a \u0627\u0644\u0643\u0647\u0631\u0648\u0645\u063a\u0646\u0627\u0637\u064a\u0633\u064a. \u0646\u0637\u0627\u0642 \u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644 \u0645\u0646 -55 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +150 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 (TJ).<\/p>","protected":false},"excerpt":{"rendered":"
The NTJD4001NT1G from onsemi is a dual N-channel enhancement-mode small-signal MOSFET in a 6-pin SC-88 (SOT-363\/SC-70-6) package (2.0 x 1.25 x 0.9 mm). Both channels share a common source (pin 3). Key specs per channel: 30-V VDSS, 250-mA continuous drain current, 1.0 \u03a9 typical RDS(on) at VGS=4V, 1.5 \u03a9 max RDS(on) at VGS=4V, 1.2-V typical […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,55],"tags":[],"chip_brand":[144],"class_list":["post-2056","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-transistors","chip_brand-on"],"acf":{"brief_explanation":"Dual N-ch MOSFET, 30V, 250mA, 1.0\u03a9 Rds@4V, common source, SC-88\/SOT-363, ESD-protected, -55~150\u00b0C","date_code":"","package_case":"SC-88 \/ SC-70-6 \/ SOT-363 (2.0 x 1.25 x 0.9 mm, 0.65mm pitch)","in_stock":103945,"datasheet":"https:\/\/www.onsemi.com\/download\/data-sheet\/pdf\/ntjd4001n-d.pdf","price":"$0.13 (3K+ pcs)","product_introduction":"The NTJD4001NT1G from onsemi is a dual N-channel small-signal MOSFET specifically designed for Li-ion battery-powered portable devices such as cell phones, PDAs, and digital still cameras. The two MOSFETs share a common source pin, making the device ideal for half-bridge, load-switch, and level-shifting applications where both transistors connect to the same ground reference.\n\nThe 30-V drain-source voltage rating provides ample margin for Li-ion battery applications (2.7-4.2 V) and also supports 5-V and 12-V logic-level switching. The 1.0-\u03a9 typical RDS(on) at VGS = 4 V results in only 62.5 mW of conduction loss at 250 mA, well within the 272-mW package rating.\n\nThe gate charge of 0.9 nC (typical at VGS = 5 V) is extremely low, enabling fast switching with minimal gate-drive power. This makes the NTJD4001N suitable for high-frequency DC-DC converter applications (up to several MHz) where gate-drive losses must be minimized.\n\nThe ESD-protected gate can withstand electrostatic discharge events during handling and assembly, a practical benefit in high-volume consumer electronics manufacturing. The 1.2-V typical threshold voltage allows the MOSFETs to be driven directly from 1.8-V logic (with RDS(on) increasing to 2.5 \u03a9 at VGS = 2.5 V).\n\nThe SC-88 (SOT-363) package occupies only 2.5 mm\u00b2 of board area, making it one of the smallest dual-MOSFET packages available. The MSL-1 rating ensures unlimited floor life before soldering.\n\nAn automotive-qualified version (NVTJD4001NT1G) with AEC-Q101 compliance is available for automotive applications.\n\nThe common-source configuration means that the two MOSFETs cannot be used independently when different source voltages are required. For independent dual N-channel MOSFETs with isolated sources, consider the NTJD4002NT1G or 2N7002KVT1G.","working_principle":"**N-Channel Enhancement MOSFET:** Each channel is an N-channel enhancement-mode MOSFET. With VGS below the threshold (VGS(th) = 1.2 V typical), no channel forms and the drain-source path is high-impedance (off state). When VGS exceeds VGS(th), an inversion layer forms beneath the gate oxide, creating a conductive channel between drain and source. The channel resistance (RDS(on)) decreases with increasing VGS as the inversion layer strengthens.\n\n**Common-Source Configuration:** Both MOSFETs share pin 3 (Source 1 = Source 2). This configuration is natural for half-bridge circuits where both low-side switches connect to ground, and for load-switch pairs where both loads return to the same ground. The shared source reduces pin count from 8 to 6, enabling the tiny SC-88 package.\n\n**ESD-Protected Gate:** The gate terminal includes internal ESD protection structures (typically a Zener clamp or back-to-back diodes) that shunt ESD energy away from the thin gate oxide. The protection allows handling and assembly without special precautions while the gate oxide remains protected against electrostatic events up to the specified ESD rating.\n\n**Body Diode:** Each MOSFET has an inherent body (parasitic) diode from source to drain (forward-biased when VSD > 0.65 V). This diode conducts during dead-time in half-bridge switching and must be considered in circuit design. The reverse recovery time of 12.4 ns is fast enough for most low-power switching applications.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | Drain 1<\/td> | O<\/td> | Channel 1 drain; 30V max; 250mA continuous; connect to load or half-bridge node<\/td><\/tr> | ||||||||||||||||||||||||||||
| 2<\/td> | Gate 1<\/td> | I<\/td> | Channel 1 gate; ESD-protected; drive with 1.8-5V logic for switching; VGS max \u00b120V; 0.9nC gate charge<\/td><\/tr> | ||||||||||||||||||||||||||||
| 3<\/td> | Source 1\/2<\/td> | P\/G<\/td> | Common source for both channels; typically connected to ground for low-side switching; 250mA per channel max<\/td><\/tr> | ||||||||||||||||||||||||||||
| 4<\/td> | Gate 2<\/td> | I<\/td> | Channel 2 gate; independent gate control; same characteristics as Gate 1<\/td><\/tr> | ||||||||||||||||||||||||||||
| 5<\/td> | Drain 2<\/td> | O<\/td> | Channel 2 drain; independent drain connection; same voltage\/current ratings as Drain 1<\/td><\/tr> | ||||||||||||||||||||||||||||
| 6<\/td> | Drain 2<\/td> | O<\/td> | Channel 2 drain (parallel with pin 5); both pins 5 and 6 are internally connected; connect together on PCB<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
|