The MC74AC04DG from onsemi is a hex inverter IC containing six independent inverter gates in a 14-pin SOIC package, performing the Boolean function Y = NOT(A). Part of the 74AC (Advanced CMOS) family, it operates from 2V to 6V VCC with output source\/sink capability of 24mA. Maximum propagation delay: 7ns at 5V, 9ns at 3.3V. Quiescent supply current: 4uA maximum. The AC family provides higher output drive and faster switching than HC family devices. Inputs are CMOS compatible (VIH = 70% VCC, VIL = 30% VCC). The ACT version (MC74ACT04) provides TTL-compatible inputs. ESD protection exceeds 2000V HBM, 200V MM, 1000V CDM. Latch-up performance exceeds 100mA. Operating temperature: -40C to 85C. SOIC-14 package, 55 units per rail (DG suffix). Pb-free, RoHS compliant, EAR99. Active product status.<\/p>","protected":false},"excerpt":{"rendered":"
The MC74AC04DG from onsemi is a hex inverter IC containing six independent inverter gates in a 14-pin SOIC package, performing the Boolean function Y = NOT(A). Part of the 74AC (Advanced CMOS) family, it operates from 2V to 6V VCC with output source\/sink capability of 24mA. Maximum propagation delay: 7ns at 5V, 9ns at 3.3V. […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,15],"tags":[],"chip_brand":[144],"class_list":["post-1903","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-logic-chips","chip_brand-on"],"acf":{"brief_explanation":"Hex inverter (6 NOT gates), 74AC family, 2-6V, 24mA output, 7ns tpd@5V, SOIC-14, -40~85C","date_code":"","package_case":"SOIC-14 (Case 751A) (8.65 x 3.9 x 1.5 mm)","in_stock":4702,"datasheet":"https:\/\/www.onsemi.com\/pub\/Collateral\/MC74AC04-D.PDF","price":"$0.23 (55+ pcs)","product_introduction":"The MC74AC04DG from onsemi is a hex inverter integrated circuit containing six independent inverter gates in a single 14-pin SOIC package. Each inverter performs the Boolean function Y = NOT(A), outputting the logical complement of its input. The device is part of the 74AC (Advanced CMOS) logic family, which provides significantly higher output drive current and faster switching speeds compared to the standard 74HC family.\n\nThe 74AC family operates over a VCC range of 2V to 6V, making it suitable for both 3.3V and 5V logic systems. Each output can source or sink up to 24mA, providing direct drive capability for LED indicators, small relays, and multiple TTL or CMOS logic inputs. The maximum propagation delay is 7ns at 5V with 50pF load (9ns at 3.3V), enabling use in medium-speed digital systems.\n\nThe MC74AC04 uses standard CMOS input thresholds (VIH = 70% VCC, VIL = 30% VCC), which differ from TTL thresholds. For systems requiring TTL-compatible input levels, the MC74ACT04 variant is available with the same functionality but TTL-compatible inputs (VIH = 2.0V, VIL = 0.8V). Both variants share the same pinout and are available in SOIC-14 (DG suffix, 55 units\/rail), SOIC-14 tape and reel (DR2G suffix, 2500\/reel), and TSSOP-14 (DTR2G suffix, 2500\/reel) packages.\n\nThe device features robust ESD protection exceeding 2000V HBM, 200V MM, and 1000V CDM, along with latch-up performance exceeding 100mA. The quiescent supply current is specified at 4uA maximum, providing low standby power consumption. The six inverters are electrically independent, allowing unused gates to be left unconnected (though best practice is to tie unused inputs to VCC or GND to prevent oscillation and reduce power consumption).\n\nThe MC74AC04DG is pin-compatible with the industry-standard 7404 hex inverter across all logic families (74LS04, 74HC04, 74HCT04, 74AC04, 74ACT04, 74LVC04, etc.), making it a direct upgrade path in existing designs where higher drive current or faster speed is needed. The DG suffix denotes the SOIC-14 package in rail packaging (55 units per rail). The device is Pb-free, RoHS compliant, MSL Level 1, and classified as EAR99.","working_principle":"The MC74AC04DG implements six independent CMOS inverter gates using complementary N-channel and P-channel MOSFET transistor pairs.\n\nCMOS Inverter Operation: Each inverter consists of a P-channel MOSFET (pull-up) connected between VCC and the output, and an N-channel MOSFET (pull-down) connected between the output and GND. The input signal is connected to the gates of both transistors simultaneously. When the input is LOW (below VIL), the P-channel transistor turns ON and the N-channel transistor turns OFF, pulling the output HIGH to VCC. When the input is HIGH (above VIH), the N-channel transistor turns ON and the P-channel transistor turns OFF, pulling the output LOW to GND. This push-pull configuration provides rail-to-rail output swing and strong drive capability in both directions.\n\nAdvanced CMOS (AC) Family Characteristics: The 74AC family uses a more advanced CMOS process than the 74HC family, providing: (1) Higher output drive current: 24mA source\/sink vs 4-6mA for HC; (2) Faster propagation delay: 7ns at 5V vs 50-100ns for early HC devices; (3) Wider VCC range: 2V to 6V. The trade-off is slightly higher dynamic power consumption due to faster edge rates causing larger charging\/discharging currents in the load and parasitic capacitances.\n\nInput Thresholds: The AC family uses CMOS input thresholds that scale with VCC. At 5V VCC: VIH = 3.5V (70% VCC), VIL = 1.5V (30% VCC). At 3.3V VCC: VIH = 2.31V, VIL = 0.99V. These thresholds provide excellent noise margin when driven by other CMOS outputs but may cause compatibility issues with TTL outputs (which have VOH = 2.4V minimum), hence the ACT variant with fixed TTL thresholds.\n\nPower Consumption: CMOS devices consume very low static power (4uA max ICC) because one transistor is always OFF in steady state, preventing DC current flow from VCC to GND. Dynamic power consumption is dominated by charging and discharging load capacitance: P = f x CL x VCC^2, where f is switching frequency and CL is total load capacitance. At high frequencies with heavy capacitive loads, the dynamic power can become significant.\n\nOutput Drive: The 24mA output drive capability is achieved through low ON-resistance MOSFET output transistors. The output voltage levels are guaranteed: VOH > 4.4V at IOH = -24mA (5V VCC) and VOL < 0.33V at IOL = 24mA (5V VCC). The low output impedance (typically 20-30 ohms) also makes the device suitable for driving transmission lines when terminated with appropriate impedance matching.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | 1A<\/td> | Input<\/td> | Inverter 1 input; CMOS input threshold; VIH = 70% VCC, VIL = 30% VCC; input current typically less than 1uA<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 2<\/td> | 1Y<\/td> | Output<\/td> | Inverter 1 output; Y = NOT(A); push-pull CMOS output; source\/sink 24mA at 5V VCC<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 3<\/td> | 2A<\/td> | Input<\/td> | Inverter 2 input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 4<\/td> | 2Y<\/td> | Output<\/td> | Inverter 2 output<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 5<\/td> | 3A<\/td> | Input<\/td> | Inverter 3 input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 6<\/td> | 3Y<\/td> | Output<\/td> | Inverter 3 output<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 7<\/td> | GND<\/td> | Power<\/td> | Ground; reference for all input and output logic levels; connect to system ground plane<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 8<\/td> | 4Y<\/td> | Output<\/td> | Inverter 4 output<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 9<\/td> | 4A<\/td> | Input<\/td> | Inverter 4 input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 10<\/td> | 5Y<\/td> | Output<\/td> | Inverter 5 output<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 11<\/td> | 5A<\/td> | Input<\/td> | Inverter 5 input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 12<\/td> | 6Y<\/td> | Output<\/td> | Inverter 6 output<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 13<\/td> | 6A<\/td> | Input<\/td> | Inverter 6 input<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 14<\/td> | VCC<\/td> | Power<\/td> | Supply voltage; 2V to 6V; bypass with 0.1uF ceramic capacitor to GND<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
|