The TLC2252AIDR is a dual Advanced LinCMOS rail-to-rail output op amp from TI in SOIC-8 (4.9×3.9mm). Ultra-low power: 35uA\/ch typical at 5V. Rail-to-rail output with 10mV\/60mV headroom from rails. Input common-mode includes negative rail. GBW: 210kHz, slew rate: 0.12V\/us. 1pA input bias current, 850uV max Vos (A version), 19nV\/rtHz noise at 1kHz. CMRR: 83dB, gain: 124dB. Supply: 4.4V-16V (single) or +\/-2.2V to +\/-8V (dual). -40C to +125C. MSL-1, RoHS3, EAR99. Tape and Reel, 2500\/reel. Upgrade for TLC27L2\/L4 and TS27L2\/L4.<\/p>","protected":false},"excerpt":{"rendered":"
The TLC2252AIDR is a dual Advanced LinCMOS rail-to-rail output op amp from TI in SOIC-8 (4.9×3.9mm). Ultra-low power: 35uA\/ch typical at 5V. Rail-to-rail output with 10mV\/60mV headroom from rails. Input common-mode includes negative rail. GBW: 210kHz, slew rate: 0.12V\/us. 1pA input bias current, 850uV max Vos (A version), 19nV\/rtHz noise at 1kHz. CMRR: 83dB, gain: […]<\/p>\n","protected":false},"author":2,"featured_media":1870,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[19,13],"tags":[],"chip_brand":[138],"class_list":["post-1835","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-analog-linear-ics","category-integrated-circuits-ics","chip_brand-ti"],"acf":{"brief_explanation":"Dual rail-to-rail CMOS op amp, 35uA\/ch, 210kHz GBW, 19nV\/rtHz, SOIC-8, -40~125C","date_code":"","package_case":"SOIC-8 (4.9 x 3.9 x 1.5 mm)","in_stock":6799,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/tlc2252a.pdf","price":"$1.26 (1K+ pcs)","product_introduction":"The TLC2252AIDR is a dual-channel rail-to-rail output CMOS operational amplifier from Texas Instruments, part of the Advanced LinCMOS family. It is specifically designed for very low-power, single-supply or split-supply applications where rail-to-rail output swing and high input impedance are critical. The device is housed in an 8-pin SOIC package.\n\nEach channel consumes only 35 uA of supply current (typical at 5V), making the TLC2252AIDR one of the most power-efficient dual op amps in its class. Despite this ultra-low power consumption, the device delivers a gain bandwidth product of 210 kHz and a slew rate of 0.12 V\/us. The input bias current is an exceptionally low 1 pA (typical), making the amplifier ideal for interfacing with high-impedance sources such as piezoelectric transducers, photodiodes, and pH electrodes.\n\nThe output stage swings rail-to-rail, meaning the output voltage can approach both the positive and negative supply rails with minimal headroom. The output swing headroom is typically 10 mV from the negative rail and 60 mV from the positive rail at light loads, providing maximum dynamic range in single-supply applications.\n\nThe input common-mode voltage range includes the negative rail and extends to within 0.8V of the positive rail, allowing ground-sensing applications in single-supply configurations. The TLC2252A variant (indicated by the A suffix in TLC2252AIDR) provides enhanced precision with a maximum input offset voltage of 850 uV at 25C, compared to 1.5 mV for the standard TLC2252.\n\nKey specifications at 5V single supply: gain bandwidth product 210 kHz (typical), slew rate 0.12 V\/us (typical), input voltage noise 19 nV\/sqrt(Hz) at 1 kHz, CMRR 83 dB (typical), open-loop voltage gain 124 dB (typical). The device operates from a total supply voltage of 4.4V to 16V (single supply) or +\/-2.2V to +\/-8V (dual supply). The operating temperature range is -40C to +125C.\n\nThe A suffix denotes the enhanced-precision version with lower offset voltage. The I suffix denotes the SOIC-8 package. The D suffix denotes the SOIC package type. The R suffix denotes tape and reel packaging (2,500 units per reel). The TLC2252AIDR is RoHS3 compliant, MSL Level 1 (unlimited), and EAR99 classified.\n\nThis device is an excellent performance upgrade for the TS27L2\/L4 and TLC27L2\/L4 op amps, offering increased output dynamic range, lower noise voltage, and lower input offset voltage in the same package footprint.","working_principle":"The TLC2252AIDR operates as a dual-channel CMOS operational amplifier with rail-to-rail output capability, optimized for ultra-low power consumption and high input impedance.\n\nCMOS Input Stage: The input stage uses PMOS differential pairs, providing the extremely low input bias current of 1 pA (typical). This is several orders of magnitude lower than bipolar input op amps, making the TLC2252AIDR ideal for applications where the source impedance is high (above 100 kohm). The PMOS input pair also allows the common-mode input voltage range to include the negative supply rail, enabling ground-sensing in single-supply circuits. The input common-mode range extends from 0.3V below the negative rail to within approximately 0.8V of the positive rail. The input offset voltage is laser-trimmed to 850 uV maximum (A version) at 25C, with a typical drift of only 0.5 uV\/C, ensuring stability over temperature.\n\nRail-to-Rail Output Stage: The output stage uses a complementary PMOS\/NMOS push-pull configuration that allows the output to swing to within millivolts of both supply rails. Unlike many op amps that use a common-emitter output stage requiring at least 1-2V of headroom, the CMOS output stage behaves as a low-resistance switch between the output and the supply rails when the output is near the rails. The output swing headroom is typically 10 mV from the negative rail and 60 mV from the positive rail at light loads (RL = 100 kohm). At heavier loads (RL = 10 kohm), the headroom increases to approximately 30-100 mV. The output can source or sink up to 8 mA (typical) while maintaining good linearity.\n\nFrequency Compensation and Stability: The TLC2252A is internally compensated for unity-gain stability, with a gain-bandwidth product of 210 kHz and a phase margin sufficient for stable operation in voltage-follower (unity gain) configuration. The device can drive capacitive loads up to several hundred picofarads without oscillation. For larger capacitive loads, a small series output resistor (50-100 ohm) isolates the capacitive load from the output stage, maintaining stability.\n\nPower Supply Operation: The device operates over a wide supply voltage range: 4.4V to 16V total (single supply) or +\/-2.2V to +\/-8V (dual supply). The quiescent supply current per channel is 35 uA (typical at 5V), with a maximum of 80 uA per amplifier across the full temperature range. The total supply current for both channels is therefore typically 70 uA, making the device suitable for battery-powered applications where micropower operation is essential. The device is fully specified at both 5V single supply and +\/-5V dual supply.\n\nNoise Performance: The input voltage noise density is 19 nV\/sqrt(Hz) at 1 kHz, which is four times lower than competitive micropower CMOS op amps. The input current noise density is typically 0.6 fA\/sqrt(Hz), negligible for most applications. The relatively low voltage noise combined with the ultra-low current noise makes the TLC2252AIDR excellent for amplifying signals from high-impedance sources where the noise contribution from the amplifier should not dominate the source noise.\n\nChannel Isolation: The two amplifier channels share the same supply pins but are otherwise independent. The channel-to-channel crosstalk isolation is typically better than 80 dB at low frequencies, ensuring that signals in one channel do not corrupt signals in the other channel.","pin_description":"
| Pin<\/th> | Name<\/th> | Type<\/th> | Description<\/th><\/tr><\/thead> | ||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1<\/td> | 1OUT<\/td> | Output<\/td> | Channel 1 output; rail-to-rail swing; can source\/sink up to 8 mA typical<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 2<\/td> | 1IN-<\/td> | Input<\/td> | Channel 1 inverting input; 1 pA typical input bias current; 850 uV max offset voltage (A version)<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 3<\/td> | 1IN+<\/td> | Input<\/td> | Channel 1 non-inverting input; common-mode range includes negative rail<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 4<\/td> | VSS\/GND<\/td> | Power<\/td> | Negative supply or ground (single supply); connect to system ground or negative rail<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 5<\/td> | 2IN+<\/td> | Input<\/td> | Channel 2 non-inverting input; common-mode range includes negative rail<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 6<\/td> | 2IN-<\/td> | Input<\/td> | Channel 2 inverting input; 1 pA typical input bias current<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 7<\/td> | 2OUT<\/td> | Output<\/td> | Channel 2 output; rail-to-rail swing; can source\/sink up to 8 mA typical<\/td><\/tr> | ||||||||||||||||||||||||||||||||||||
| 8<\/td> | VDD<\/td> | Power<\/td> | Positive supply; 4.4V to 16V total supply (single) or up to +\/-8V (dual); bypass with 0.1 uF ceramic<\/td><\/tr><\/tbody><\/table>","application_scenarios":"
|